KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 55

• Manufacturer Part Number: KS8893ML
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
• Manufacturer: MICREL [Micrel Semiconductor]

Register 1 (0x01): Chip ID1 / Start Switch
Bit
7-4
3-1
0
Register 2 (0x02): Global Control 0
Bit
7
6-4
3
2
1
0
June 2005
Name
Name
Enable
Pass Flow
Control Packet
Link Change
Age
Chip ID
Revision ID
Start Switch
New Back-off
Reserved
Reserved
Reserved
R/W
RO
RO
RW
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
0x2 is assigned to M series. (93M)
Revision ID
= 1, start the chip when external pins
Note: In (PS1, PS0) = (0, 0) mode, the chip will start
automatically after trying to read the external
EEPROM. If EEPROM does not exist, the chip will
use pin strapping and default values for all internal
registers. If EEPROM is present, the contents in the
EEPROM will be checked. The switch will check: (1)
Register 0 = 0x88, (2) Register 1 bits [7:4] = 0x2. If
this check is OK, the contents in the EEPROM will
override chip registers’ default values.
= 0, chip will not start when external pins
Description
New back-off algorithm designed for UNH
Reserved
Do not change the default value.
= 1, switch will not filter 802.1x “flow control” packets
Reserved
Do not change the default value.
Reserved
Do not change the default value.
= 1, link change from “link” to “no link” will cause fast
aging (<800us) to age address table faster. After an
age cycle is complete, the age logic will return to
normal aging (about 200 sec).
Note: If any port is unplugged, all addresses will be
automatically aged out.
(PS1, PS0) = (0,1) or (1,0) or (1,1).
1 = Enable
0 = Disable
(PS1, PS0) = (0,1) or (1,0) or (1,1).
55
Default
0x2
-
-
Default
0x0
0x4
0x0
0x1
0
0
M9999-063005