AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 150
AT91RM3400-AI-001
Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91RM3400-AI-001.pdf
(461 pages)
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PMC Master Clock Register
Register Name: PMC_MCKR
Access Type:
Note: Value to be written in PMC_MCKR must not be the same as current value in PMC_MCKR.
• CSS: Master Clock Selection
• PRES: Master Clock Prescaler
• MDIV: Master Clock Division (on ARM9-based systems only)
0 = The Master Clock and the Processor Clock are the same.
1 = The Processor Clock is twice as fast as the Master Clock.
2 = The Processor Clock is three times faster than the Master Clock.
3 = The Processor Clock is four times faster than the Master Clock.
150
31
23
15
–
–
–
–
7
AT91RM3400
0
0
0
0
1
1
1
1
Read/Write
0
0
1
1
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
PRES
CSS
0
0
1
1
0
0
1
1
28
20
12
–
–
–
4
0
1
0
1
PRES
0
1
0
1
0
1
0
1
27
19
11
–
–
–
3
Clock Source Selection
Slow Clock is selected
Main Clock is selected
PLL A Clock is selected
PLL B Clock is selected
Master Clock
Selected clock
Selected clock divided by 2
Selected clock divided by 4
Selected clock divided by 8
Selected clock divided by 16
Selected clock divided by 32
Selected clock divided by 64
Reserved
26
18
10
–
–
–
2
25
17
–
–
9
1
MDIV
CSS
1790A–ATARM–11/03
24
16
–
–
8
0
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