ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 129
ATMEGA8L
Manufacturer Part Number
ATMEGA8L
Description
8-bit AVR with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
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Data Modes
2486M–AVR–12/03
There are four combinations of SCK phase and polarity with respect to serial data,
which are determined by control bits CPHA and CPOL. The SPI data transfer formats
are shown in Figure 59 and Figure 60. Data bits are shifted out and latched in on oppo-
site edges of the SCK signal, ensuring sufficient time for data signals to stabilize. This is
clearly seen by summarizing Table 48 and Table 49, as done below:
Table 51. CPOL and CPHA Functionality
Figure 59. SPI Transfer Format with CPHA = 0
Figure 60. SPI Transfer Format with CPHA = 1
MSB first (DORD = 0)
LSB first (DORD = 1)
CPOL = 0, CPHA = 0
CPOL = 0, CPHA = 1
CPOL = 1, CPHA = 0
CPOL = 1, CPHA = 1
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB
LSB
MSB
LSB
Bit 6
Bit 1
Sample (Falling)
Sample (Rising)
Leading Edge
Setup (Falling)
Setup (Rising)
Bit 6
Bit 1
Bit 5
Bit 2
Bit 5
Bit 2
Bit 4
Bit 3
Bit 4
Bit 3
Sample (Falling)
Sample (Rising)
Bit 3
Bit 4
Setup (Falling)
Trailing Edge
Setup (Rising)
Bit 3
Bit 4
Bit 2
Bit 5
ATmega8(L)
Bit 2
Bit 5
Bit 1
Bit 6
Bit 1
Bit 6
SPI Mode
LSB
MSB
0
1
2
3
LSB
MSB
129