M306V0ME-107FP MITSUBISHI [Mitsubishi Electric Semiconductor], M306V0ME-107FP Datasheet - Page 78
M306V0ME-107FP
Manufacturer Part Number
M306V0ME-107FP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M306V0ME-107FP.pdf
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78
Figure 2.9.9 An example of DMA transfer effected by external factors
(3) The priorities of channels and DMA transfer timing
the signal’s edge applicable to the function specified by the DMA request factor selection bit (synchro-
nizes with the trailing edge of the input signal to each INTi pin, for example).
With an external factor selected, the DMA request bit is timed to turn to 0 immediately before data
transfer starts similarly to the state in which an internal factor is selected.
If a DMA transfer request signal falls on a single sampling cycle (a sampling cycle means one period
from the leading edge to the trailing edge of BCLK), the DMA request bits of applicable channels
concurrently turn to 1. If the channels are active at that moment, DMA0 is given a high priority to start
data transfer. When DMA0 finishes data transfer, it gives the bus right to the CPU. When the CPU
finishes single bus access, then DMA1 starts data transfer and gives the bus right to the CPU. Figure
2.9.9 illustrates these operations.
An example in which DMA transfer is carried out in minimum cycles at the time when DMA transfer
request signals due to external factors concurrently occur.
DMA1
request bit
BCLK
DMA0
DMA1
CPU
INT0
DMA0
request bit
INT1
An example in which DMA transmission is carried out in minimum
cycles at the time when DMA transmission request signals due to
external factors concurrently occur.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
_______
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V0ME-XXXFP
M306V0EEFP
Obtainm
ent of the
bus right
Rev. 1.0
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