S9S08AW16A FREESCALE [Freescale Semiconductor, Inc], S9S08AW16A Datasheet - Page 244

• Manufacturer Part Number: S9S08AW16A
• Description: HCS08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 14 Analog-to-Digital Converter (S08ADC10V1)
14.2.1
The ADC module is capable of performing conversions using the MCU bus clock, the bus clock divided
by two, the local asynchronous clock (ADACK) within the module, or the alternate clock, ALTCLK. The
alternate clock for the MC9S08AC16 Series MCU devices is the external reference clock (ICGERCLK)
from the internal clock generator (ICG) module.
Because ICGERCLK is active only while an external clock source is enabled, the ICG must be configured
for either FBE or FEE mode (CLKS1 = 1). ICGERCLK must run at a frequency such that the ADC
conversion clock (ADCK) runs at a frequency within its specified range (f
from the ALTCLK input as determined by the ADIV bits. For example, if the ADIV bits are set up to divide
by four, then the minimum frequency for ALTCLK (ICGERCLK) is four times the minimum value for
f
frequency requirement, when an oscillator circuit is used it must be configured for high range operation
(RANGE = 1).
ALTCLK is active while the MCU is in wait mode provided the conditions described above are met. This
allows ALTCLK to be used as the conversion clock source for the ADC while the MCU is in wait mode.
ALTCLK cannot be used as the ADC conversion clock source while the MCU is in stop3.
14.2.2
The ADC hardware trigger, ADHWT, is output from the real time interrupt (RTI) counter. The RTI counter
can be clocked by either ICGERCLK or a nominal 1 kHz clock source within the RTI block. The 1-kHz
clock source can be used with the MCU in run, wait, or stop3. With the ICG configured for either FBE or
FEE mode, ICGERCLK can be used with the MCU in run or wait.
The period of the RTI is determined by the input clock frequency and the RTIS bits. When the ADC
hardware trigger is enabled, a conversion is initiated upon an RTI counter overflow. The RTI counter is a
free running counter that generates an overflow at the RTI rate determined by the RTIS bits.
14.2.2.1
The ADC on MC9S08AC16 Series contains only two analog pin enable registers, APCTL1 and APCTL2.
244
ADCK
ADCH
01111
and the maximum frequency is four times the maximum value for f
Alternate Clock
Hardware Trigger
Channel
AD15
Analog Pin Enables
Selecting the internal bandgap channel requires BGBE =1 in SPMSC1 see
Section 5.9.8, “System Power Management Status and Control 1 Register
(SPMSC1).” For value of bandgap voltage reference see
Characteristics.”
V
Input
Table 14-1. ADC Channel Assignment (continued)
REFL
MC9S08AC16 Series Data Sheet, Rev. 8
Pin Control
N/A
NOTE
ADCH
11111
Channel
disabled
module
Section A.6, “DC
ADCK
ADCK
) after being divided down
. Because of the minimum
Input
None
Freescale Semiconductor
Pin Control
N/A