FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 17

• Manufacturer Part Number: FDC37B78X
• Description: Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
• Manufacturer: SMSC Corporation

STATUS REGISTER A (SRA)
Address 3F0 READ ONLY
This register is read-only and monitors the state of the FINTR pin and several disk interface pins in
PS/2 and Model 30 modes. The SRA can be accessed at any time when in PS/2 mode. In the PC/AT
mode the data bus pins D0 - D7 are held in a high impedance state for a read of address 3F0.
PS/2 Mode
BIT 0 DIRECTION
Active high status indicating the direction of
head movement. A logic "1" indicates inward
direction; a logic "0" indicates outward direction.
BIT 1 nWRITE PROTECT
Active low status of the WRITE PROTECT disk
interface input. A logic "0" indicates that the disk
is write protected. (See also Force Write Protect
Function)
BIT 2 nINDEX
Active low status of the INDEX disk interface
input.
BIT 3 HEAD SELECT
Active high status of the HDSEL disk interface
input. A logic "1" selects side 1 and a logic "0"
selects side 0.
RESET
COND.
PENDING
INT
7
0
nDRV2
6
1
STEP
5
0
17
nTRK0 HDSEL nINDX
N/A
BIT 4 nTRACK 0
Active low status of the TRK0 disk interface
input.
BIT 5 STEP
Active high status of the STEP output disk
interface output pin.
BIT 6 nDRV2
Active low status of the DRV2 disk interface
input pin, indicating that a second drive has
been installed.
supported in this chip. (Always 1, indicating
1 drive)
BIT 7 INTERRUPT PENDING
Active high bit indicating the state of the Floppy
Disk Interrupt output.
4
3
0
N/A
Note:
2
nWP
N/A
This function is not
1
DIR
0
0