FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 202

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FDC37B78X

Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
UART2 FIFO
Control Shadow
Forced Write
Protect
Default = 0x00
on VTR POR
NAME
0xC5 R/W
0xC4 R
INDEX
REG
UART2 FIFO Control Shadow Register
Bit[7] RCVR Trigger MSB
Bit[6] RCVR Trigger LSB
Bit[5] Reserved
Bit[4] Reserved
Bit[3] DMA Mode Select
Bit[2] XMIT FIFO Reset
Bit[1] RCVR FIFO Reset
Bit[0] FIFO Enable
Force Write Protect function forces the FDD
nWRTPRT input active if the FORCE WRTPRT bit
is active. The Force Write Protect function applies
to the nWRTPRT pin in the FDD Interface as well
as the nWRTPRT pin in the Parallel Port FDC.
Bit[0] Force Write Protect bit FDD0
0 = Inactive (Default)
1 = Active “forces the FDD nWRTPRT input active
when the drive has been selected” Note 2
Bit[1:7] Reserved, reads 0.
202
DEFINITION
STATE

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