UPSD3233 STMicroelectronics, UPSD3233 Datasheet - Page 105

• Manufacturer Part Number: UPSD3233
• Description: Flash Programmable System Devices with 8032 Microcontroller Core
• Manufacturer: STMicroelectronics

PSD MODULE REGISTER DESCRIPTION AND ADDRESS OFFSET
Table 84 shows the offset addresses to the PSD
MODULE registers relative to the CSIOP base ad-
dress. The CSIOP space is the 256 bytes of ad-
dress that is allocated by the user to the internal
Table 84. Register Address Offset
Note: 1. Other registers that are not part of the I/O ports.
Data In
Control
Data Out
Direction
Drive Select
Input Macrocell
Enable Out
Output Macrocells
AB
Output Macrocells
BC
Mask Macrocells AB
Mask Macrocells BC
Primary Flash
Protection
Secondary Flash
memory Protection
PMMR0
PMMR2
Page
VM
Register Name
00
02
04
06
08
0A
0C
20
22
Port A
01
03
05
07
09
0D
20
21
22
23
Port B
0B
10
12
14
16
18
1A
21
23
Port C
UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
11
13
15
17
1B
Port D Other
C0
C2
B0
B4
E0
E2
PSD MODULE registers. Table 84 provides brief
descriptions of the registers in CSIOP space. The
following section gives a more detailed descrip-
tion.
(1)
Reads Port pin as input, MCU I/O Input Mode
Selects mode between MCU I/O or Address Out
Stores data for output to Port pins, MCU I/O
Output Mode
Configures Port pin as input or output
Configures Port pins as either CMOS or Open
Drain on some pins, while selecting high slew rate
on other pins.
Reads Input Macrocells
Reads the status of the output enable to the I/O
Port driver
READ – reads output of macrocells AB
WRITE – loads macrocell flip-flops
READ – reads output of macrocells BC
WRITE – loads macrocell flip-flops
Blocks writing to the Output Macrocells AB
Blocks writing to the Output Macrocells BC
Read-only – Primary Flash Sector Protection
Read-only – PSD MODULE Security and
Secondary Flash memory Sector Protection
Power Management Register 0
Power Management Register 2
Page Register
Places PSD MODULE memory areas in Program
and/or Data space on an individual basis.
Description
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