DA82562EZ Intel, DA82562EZ Datasheet - Page 11

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DA82562EZ

Manufacturer Part Number
DA82562EZ
Description
10/100 Mbps Platform LAN Connect
Manufacturer
Intel
Datasheet
3.0
3.1
3.2
3.3
Datasheet
a. Based on some board designs, RBIAS100 and RBIAS10 values may need to be increased/decreased to compensate for high/
82562EZ Signal Descriptions
Signal Type Definitions
Twisted Pair Ethernet (TPE) Pins
External Bias Pins
TDP
TDN
RDP
RDN
RBIAS100
RBIAS10
I
O
I/O
MLT
B
DPS
APS
Pin Name
Pin Name
low MDI transmit amplitude. See the 82562EZ(EX)/82551ER(IT) & 82541ER Combined Footprint LOM Design Guide for more
information.
Type
Input
Output
Input/Output
Multi-level
analog I/O
Bias
Digital Power
Supply
Analog Power
Supply
Name
MLT
MLT
B
B
Type
Type
Transmit Differential Pair. The transmit differential pair sends serial bit streams to
the unshielded twisted pair (UTP) cable. The differential pair is a two-level signal in
10BASE-T (Manchester) mode and a three-level signal in 100BASE-TX mode (MLT-
3). These signals directly interface with the isolation transformer.
Receive Differential Pair. The receive differential pair receive the serial bit stream
from an unshielded twisted pair (UTP) cable. The differential pair is a two-level signal
in 10BASE-T mode (Manchester) or a three-level signal in 100BASE-TX mode (MLT-
3). These signals directly interface with an isolation transformer.
Reference Bias Resistor (100 Mbps). This pin should be connected to a pull-down
resistor.
Reference Bias Resistor (10 Mbps). This pin should be connected to a pull-down
resistor.
Input pin to the 82562EZ.
Output pin from the 82562EZ.
Multiplexed input and output pin to and from the 82562EZ.
Multi-level analog pin used for input and output.
Bias pin used for ground connection through a resistor or an external voltage
reference.
Digital power or ground pin for the 82562EZ.
Analog power or ground pin for the 82562EZ.
a
a
Description
Description
Description
Networking Silicon — 82562EZ
5

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