DA82562EZ Intel, DA82562EZ Datasheet - Page 21

• Manufacturer Part Number: DA82562EZ
• Description: 10/100 Mbps Platform LAN Connect
• Manufacturer: Intel

The 82562EZ can enter a reduced power state manually through bit 11 of register 0. This bit is ORed with the LAN
Connect power down bit, which allows the 82562EZ to enter a reduced power state.
4.5
When 82562EZ’s Reset signal (RSTSYNC) is asserted for at least 500 µseconds, all internal circuits are reset. The
82562EZ can also be reset through the MII management register reset bit (register 0, bit 15).
4.6
The 82562EZ supports the LAN connect interface as specified in the LAN Connect Interface Specification. The
LAN Connect is the I/O Control Hub 4(ICH4) interface to the 82562EZ. The 8-pin interface incorporates all MII
and MII management functionality and includes the reset functionality as well.
4.6.1
The 82562EZ drives a 50 MHz or 5 MHz clock to the MAC depending on the selected technology (100BASE-TX
or 10BASE-T, respectively). The 82562EZ does not stop the LAN Connect clock for any reason. During reduced
power mode, the 82562EZ drives a 5 MHz clock.
4.6.2
To determine the type of signal on the PLC Reset/Synchronization pin, the 82562EZ filters out pulses that are less
than 200 nanoseconds. To reset the 82562EZ, the pulse should be longer than 500 µseconds.
4.7
Datasheet
Table 4. Register 0: Control Data
Table 5. LED Functionality
Reset
LAN Connect Interface
LAN Connect Clock
LAN Connect Reset
LED Functionality
11
ACTLED#
SPDLED#
LILED#
LED Driver
Bit
Reduced Power Down
Activity
Speed
Link valid
Function
Name
The driver blinks at a rate related to the utilization. The blinking occurs during
transmission or reception of a frame.
The driver is low for 100BASE-TX operation and high for 10BASE-T mode.
The driver is low when a valid link is present.
0 = Reduced power down disabled (normal
1 = Reduced power down enabled
operation; default)
Description
Description
Networking Silicon — 82562EZ
Read/Write
Read/Write
15