DA82562EZ Intel, DA82562EZ Datasheet - Page 30

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DA82562EZ

Manufacturer Part Number
DA82562EZ
Description
10/100 Mbps Platform LAN Connect
Manufacturer
Intel
Datasheet
82562EZ — Networking Silicon
5.3.10
5.3.11
24
Register 25: 10BASE-T Transmit Jabber Detect Counter Bit
Definitions
Register 27: PHY Unit Special Control Bit Definitions
15:0
15:6
5
4
3
2:0
Bit(s)
Bit(s)
Jabber Detect
Counter
Reserved
Switch Probe
Mapping
Reserved
100BASE-TX
Receive Jabber
Disable
LED Switch Con-
trol
Name
Name
This is a 16-bit counter that increments for each jab-
ber detection event. The counter stops when it is full
and self-clears on read.
These bits are reserved and should be set to a con-
stant 0.
This bit switches the mapping on the LEDs. The LED
mapping is described below in bits 2:0, LED Switch
Control. This bit should always be set to 0b.
This bit is reserved and should be set to 0.
This bit enables the carrier sense disconnection while
the PHY is in jabber mode at 100 Mbps speed.
Value
000
001
010
011
100
101
110
111
ACTLED#
Activity
Speed
Speed
Activity
Off
Off
On
On
Description
Description
LILED#
Link
Collision
Link
Collision
Off
On
Off
On
Default
Default
000
--
0
0
0
0
Datasheet
RO
SC
RO
RW
RO
RW
RW
R/W
R/W

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