EVAL-ADAU1701EB AD [Analog Devices], EVAL-ADAU1701EB Datasheet - Page 23

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EVAL-ADAU1701EB

Manufacturer Part Number
EVAL-ADAU1701EB
Description
SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
On power-up, the ADAU1701 can load a set of program and
parameters that are saved in an external EEPROM. Combined
with the auxiliary ADC and the multipurpose pins, this
eliminates the need for a microcontroller in the system. The
self-booting is accomplished by the ADAU1701 acting as a
master on the I
Selfboot pin is set high. The ADAU1701 cannot self-boot in SPI
mode.
The maximum necessary EEPROM size is 9,248 bytes, or just
over 9 kB. This much memory will only be needed if the
program RAM (1024 × 5 bytes), parameter RAM (1024 × 4
bytes), and interface registers (8 × 4 bytes) are each completely
full. In most applications, an 8 kB EEPROM will be sufficient.
A selfboot operation is triggered on the rising edge of RESETB
when the SELFBOOT and WP pins are set high. The
ADAU1701 reads a program, parameters, and register settings
from the EEPROM. Once the ADAU1701 has finished
selfbooting, further messages may be sent to the ADAU1701 on
the I
selfbooting application. The I
write and 0x69 for a read in this mode. The ADDRx pins have
different functions when the chip is in this mode, so the
settings on them are ignored.
The ADAU1701 will not selfboot if WP is set low. Holding this
pin low allows the EEPROM to be programmed in-circuit. The
WP pin must be pulled low (it will normally have a resistor
pull-up) to enable writes to the EEPROM and this disables
selfboot until WP is taken high.
The ADAU1701 is a master on the I
writeback. While it would be uncommon for an application
using selfboot to also have a microcontroller in on the control
lines, care should be taken that no other device tries to write to
the I
generates SCL at 8 × fs, so at fs = 48 kHz SCL will run at 384
kHz. SCL has a duty cycle of 3/8 in accordance with the I
specification.
The ADAU1701 reads from EEPROM chip address 0x61. The
LSBs of the addresses of some EEPROMs are pin-configurable;
in most cases these pins should be tied low to set this address
shown here.
EEPROM format
The EEPROM data contains a sequence of messages. Each
discrete message will be one of the seven types defined in Table
19. Each message consists of a sequence of one or more bytes.
The first byte identifies the message type. Bytes are written
MSB-first. Most messages will be block write (0x01) types,
SELF BOOT
2
2
C bus, although this typically won’t be necessary in a
C bus during selfboot or writeback. The ADAU1701
2
C bus on start-up, which occurs when the
2
C device address is 0x68 for a
2
C bus during selfboot and
2
C
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which are used for writing to the ADAU1701’s program RAM,
parameter RAM, and control registers.
The body of the message following the message type should
start with a 0x00 byte – this is the chip address. After this there
is always a 2-byte register/memory address field, as there are
with all other control port transactions.
WriteBack
A writeback occurs when the WB pin is triggered and data is
written to the EEPROM from the ADAU1701. This function is
typically used to save volume and other parameter settings to
the EEPROM just before power is removed from the system. A
rising edge on the WB pin triggers a writeback when the
ADAU1701 is in selfboot mode, unless a Set WB to Falling
Edge Sensitive (0x05) message was contained in the selfboot
message sequence. Only one write back will take place unless a
Set Multiple Write Back (0x04) message was contained in the
selfboot message sequence. The WP pin will be pulled low
when a writeback is triggered in order to allow writing to the
EEPROM.
The ADAU1701 is only capable of writing back the contents of
the interface registers to the EEPROM. These registers are
usually set by the DSP program, but can also be written to
directly after setting bit 6 of the
Table 19. EEPROM Message Types
Message ID
0x00
0x01
0x02
0x03
0x04
0x05
0x06
Message Type
End
Write
Delay
No-Op
Set multiple write
back
Set WB to falling
edge sensitive
End and wait for
writeback
Following Bytes
none
2 bytes indicating
message length followed
by appropriate number
of data bytes
2 bytes for delay
none
none
none
none
ADAU1701

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