S71PL032J SPANSION [SPANSION], S71PL032J Datasheet - Page 97

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S71PL032J

Manufacturer Part Number
S71PL032J
Description
STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
Manufacturer
SPANSION [SPANSION]
Datasheet

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Notes:
1. Typical program and erase times assume the following conditions: 25×C, 3.0 V V
2. Under worst case conditions of 90×C, V
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
6. The device has a minimum erase and program cycle endurance of 100,000 cycles.
BGA Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
August 12, 2004 S29PL127J_064J_032J_MCP_00_A3
Parameter
Sector Erase Time
Chip Erase Time
Word Program Time
Accelerated Word Program Time
Chip Program Time
(Note 3)
Parameter Symbol
programming typicals assume checkerboard pattern. All values are subject to change.
bytes program faster than the maximum program times listed.
command. See Table
C
C
C
C
OUT
IN2
IN3
IN
A
= 25°C, f = 1.0 MHz.
17
WP#/ACC Pin Capacitance
PL127J
PL064J
PL032J
PL127J
PL064J
PL032J
Control Pin Capacitance
A d v a n c e
for further information on command definitions.
Parameter Description
Output Capacitance
Input Capacitance
Table 29. Erase And Programming Performance
S29PL127J/S29PL064J/S29PL032J for MCP
CC
I n f o r m a t i o n
= 2.7 V, 100,000 cycles. All values are subject to change.
Typ (Note 1)
50.4
25.2
12.6
135
0.5
71
39
6
4
Max (Note 2)
113.6
62.4
50.4
25.2
216
100
200
60
2
Test Setup
V
V
V
V
OUT
IN
IN
IN
= 0
= 0
= 0
= 0
Unit
sec
sec
sec
sec
sec
sec
sec
µs
µs
CC
, 100,000 cycles. Additionally,
Excludes 00h programming
prior to erasure (Note 4)
Excludes system level
overhead (Note 5)
Typ
6.3
7.0
5.5
11
Comments
Max
12
7
8
8
Unit
pF
pF
pF
pF
97

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