S71WS512NB0BAEZZ0 SPANSION [SPANSION], S71WS512NB0BAEZZ0 Datasheet - Page 131

• Manufacturer Part Number: S71WS512NB0BAEZZ0
• Description: Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
• Manufacturer: SPANSION [SPANSION]

TIMING DIAGRAMS (Continued)
Note:
June 28, 2004 S71WS512NE0BFWZZ_00_A1
Synchronous Write Timing #2 (WE# Single Clock Pulse Control)
ADDRESS
LB#, UB#
ADV#
CE#1
OE#
CLK
WE#
WAIT#
DQ
This timing diagram assumes CE2=H, the valid clock edge on rising edge and BL=8 or 16.
t
t
ASVL
ASCL
t
High-Z
BS
High
t
WSCK
Valid
t
VSCK
t
t
WLTH
CKWH
t
t
VPL
t
CLCK
CKVH
RL=5
t
AHV
P r e l i m i n a r y
t
DSCK
128Mb pSRAM
D
1
t
DHCK
t
t
WCB
DSCK
D
2
t
DSCK
D
BL
t
DHCK
t
CKBH
t
CKCLH
t
CHTZ
t
t
VHVL
WRB
t
CP
t
ASVL
t
ASCL
t
WSCK
Valid
t
VSCK
t
BS
t
t
WLTH
CKWH
t
t
CLCK
VPL
t
CKVH
t
AHV
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