AM49DL640BH56IS SPANSION [SPANSION], AM49DL640BH56IS Datasheet - Page 11

• Manufacturer Part Number: AM49DL640BH56IS
• Description: 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
• Manufacturer: SPANSION [SPANSION]

ORDERING INFORMATION
The order number (Valid Combination) is formed by the following:
Valid Combinations list configurations planned to be supported in vol-
ume for this device. Consult the local AMD or Fujitsu sales office to
confirm availability of specific valid combinations and to check on
newly released combinations.
December 5, 2003
Am49DL640BH56I
Am49DL640BH70I
Am49DL640BH85I
Am49DL640
Order Number
Valid Combinations
B
Valid Combinations
H
T, S
T, S
T, S
AMD DEVICE NUMBER/DESCRIPTION
Am49DL640BH
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Am29DL640H 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
Operation Flash Memory and 32 Mbit (2 M x 16-Bit) Pseudo Static RAM with Page Mode
70
A D V A N C E
I
Package Marking
M49000003A
M49000003B
M49000003C
T
TAPE AND REEL
T
S
TEMPERATURE RANGE
I
SPEED OPTION
See “Product Selector Guide” on page 5.
PROCESS TECHNOLOGY
H
PSEUDO SRAM DEVICE DENSITY
B
Am49DL640BH
=
=
=
=
=
I N F O R M A T I O N
7 inches
13 inches
Industrial (–40
0.13 µm
32 Mbits
MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Tables 1-2 lists the device bus operations, the
inputs and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
°
C to +85
°
C)
9