AM49DL640BH56IS SPANSION [SPANSION], AM49DL640BH56IS Datasheet - Page 24

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AM49DL640BH56IS

Manufacturer Part Number
AM49DL640BH56IS
Description
64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
Manufacturer
SPANSION [SPANSION]
Datasheet
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
system must provide the proper signals to the control
pins to prevent unintentional writes when V
greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#f
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE#f and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE#f = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
22
IL
(Word Mode)
Addresses
, CE#f = V
1Ah
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
CC
CC
Write Inhibit
is less than V
IH
LKO
or WE# = V
.
(Byte Mode)
IL
Addresses
and OE# = V
2Ch
20h
22h
24h
26h
28h
2Ah
2Eh
30h
32h
34h
CC
LKO
IH
is greater than V
, the device does not ac-
. To initiate a write cycle,
A D V A N C E
IH
Table 8. CFI Query Identification String
during power up,
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Data
LKO
CC
Am49DL640BH
. The
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
CC
is
I N F O R M A T I O N
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h in word mode (or address AAh in byte mode), any
time the device is ready to read array data. The
system can read CFI information at the addresses
given in Tables 8–11. To terminate reading CFI data,
the system must write the reset command.The CFI
Query mode is not accessible when the device is exe-
cuting an Embedded Program or embedded Erase al-
gorithm.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 8–11. The
system must write the reset command to return the
device to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/products/nvd/over-
view/cfi.html. Alternatively, contact an AMD represen-
tative for copies of these documents.
Description
December 5, 2003

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