IC42S16100-5T ICSI [Integrated Circuit Solution Inc], IC42S16100-5T Datasheet - Page 52
![no-image](/images/no-image-200.jpg)
IC42S16100-5T
Manufacturer Part Number
IC42S16100-5T
Description
512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S16100-5T.pdf
(78 pages)
- Current page: 52 of 78
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IC42S16100
Read Cycle / Clock Suspend
52
A0-A9
Note 1: A8,A9 = Don't Care.
DQM
CAS latency = 2, burst length = 2
CKE
RAS
CAS
CLK
A10
A11
WE
CS
I/O
t
CKS
t
CS
T0
t
t
t
t
t
t
t
CS
t
CS
CS
AS
AS
t
AS
CKA
CH
CK
BANK 1
BANK 0
<
ROW
ROW
ACT 0
T1
t
CHI
>
t
t
t
t
t
RAS
RC
t
t
t
t
RCD
AH
AH
CH
CH
CH
AH
T2
t
CL
t
CS
AUTO PRE
<
COLUMN m
<
NO PRE
READ A
BANK 1
BANK 0
READ
T3
>
>
(1)
t
t
QMD
CAC
t
LZ
T4
t
t
CKS
AC
t
CH
<
SPND
T5
D
OUT
t
>
OH
m
t
AC
<
SPND
T6
>
t
CKH
T7
D
OUT
m+1
BANK 0 AND 1
BANK 0 OR 1
<
BANK 0
<
BANK 1
Integrated Circuit Solution Inc.
PALL
PRE
T8
>
>
t
OH
t
t
HZ
RP
T9
DR024-0D 06/25/2004
<
BANK 1
BANK 0
T10
ROW
ACT
ROW
>
Undefined
Don’t Care
t
RAS
t
RC
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