BT848 ETC, BT848 Datasheet - Page 115

• Manufacturer Part Number: BT848
• Description: Single-Chip Video Capture for PCI
• Manufacturer: ETC

Bt848/848A/849A
Single-Chip Video Capture for PCI
Test Control Register
Memory Mapped Location 0x054 – (TEST)
This control register is reserved for putting the part into test mode. Write operation to this register may cause unde-
termined behavior and should not be attempted. A read cycle from this register returns 0x01, and only a write of 0x01
is permitted.
AGC Delay Register
Memory Mapped Location 0x060 – (ADELAY)
Upon reset, it is initialized to 0x68.
Burst Delay Register
Memory Mapped Location 0x064 – (BDELAY)
Upon reset, it is initialized to 0x5D. BDELAY(0) is the least significant bit.
Brooktree
Bits
Bits
[7:0]
[7:0]
Type
Type
®
RW
RW
Default
0x68
Default
0x5D
Name
ADELAY
Name
BDELAY
L848A_A
Description
AGC gate delay for back-porch sampling. The following equation
should be used to determine the value for this register:
Example for an NTSC input signal:
Description
The burst gate delay for sub-carrier sampling. The following equa-
tion should be used to determine the value for this register:
Example for an NTSC input signal:
ADELAY = ( 6.8 S * 4*Fsc) + 7
ADELAY = (6.8 S x 14.32 MHz) + 7
BDELAY = ( 6.5 S * 4*Fsc)
BDELAY = (6.5 S x 14.32 MHz)
= 104 (0x68)
= 93 (0x5D)
C
ONTROL
R
EGISTER
Test Control Register
D
EFINITIONS
105