BT848 ETC, BT848 Datasheet - Page 120

• Manufacturer Part Number: BT848
• Description: Single-Chip Video Capture for PCI
• Manufacturer: ETC

C
Capture Control
Capture Control
Memory Mapped Location 0x0DC – (CAP_CTL)
VBI Packet Size
Memory Mapped Location 0x0E0 – (VBI_PACK_SIZE)
VBI Packet Size / Delay
Memory Mapped Location 0x0E4 – (VBI_PACK_DEL)
110
Bits
Bits
Bits
ONTROL
[7:5]
[7:0]
[7:2]
[4]
[3]
[2]
[1]
[0]
[1]
[0]
R
EGISTER
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
D
Default
000
0
0
0
0
0
Default
0x00
Default
000000
0
0
EFINITIONS
Name
Reserved
DITH_FRAME
CAPTURE_VBI_ODD
CAPTURE_VBI_EVEN
CAPTURE_ODD
CAPTURE_EVEN
Name
VBI_PKT_LO
Name
VBI_HDELAY
EXT_FRAME
VBI_PKT_HI
Description
Lower 8 bits for the number of raw data DWORDS (four 8-bit sam-
ples) to capture while in VBI capture mode.
Description
The number of CLKx1’s to delay from the trailing edge of HRESET
before starting VBI line capture.
A value of 1 extends the frame output capture region to include the
10 lines prior to the default VACTIVE region.
Upper bit for the number of raw data DWORDS (four 8-bit sam-
ples) to capture while in VBI capture mode.
L848A_A
Description
These bits should only be written with a logical zero.
A value of 1 enables VBI data to be captured into the FIFO
during the odd field.
A value of 1 enables VBI data to be captured into the FIFO
during the even field.
A value of 1 enables odd capture, allows VDFC to write data
to FIFOs during the odd field.
A value of 1 enables even capture, allows VDFC to write data
to FIFOs during the even field.
0
1
= Dither matrix applied to consecutive lines in a field.
= Full frame mode.
Single-Chip Video Capture for PCI
Bt848/848A/849A
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