dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 233
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dsPIC33FJ32MC104-I/PT
Manufacturer Part Number
dsPIC33FJ32MC104-I/PT
Description
Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
Manufacturer
Microchip Technology
Type
dsPIC33FJ32(GP/MC)101/102/104r
Datasheet
1.DSPIC33FJ32GP102-ISO.pdf
(386 pages)
Specifications of dsPIC33FJ32MC104-I/PT
Rohs
yes
Core
dsPIC33F
Data Bus Width
16 bit
Program Memory Size
32 KB
Data Ram Size
2 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
35
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
16 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Family / Core
dsPIC33FJ32(GP/MC)101/102/104
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC104-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 233 of 386
- Download datasheet (5Mb)
REGISTER 20-2:
2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-10
bit 9
bit 8
bit 7-6
bit 5
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
R/W-0
R/W-0
CON
EVPOL<1:0>
CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
Unimplemented: Read as ‘0’
CEVT: Comparator Event bit
1 = Comparator event according to EVPOL<1:0> settings occurred; disables future triggers and
0 = Comparator event did not occur
COUT: Comparator Output bit
When CPOL = 0 (non-inverted polarity):
1 = V
0 = V
When CPOL = 1 (inverted polarity):
1 = V
0 = V
EVPOL<1:0>: Trigger/Event/Interrupt Polarity Select bits
11 = Trigger/event/interrupt is generated on any change of the comparator output (while CEVT = 0)
10 = Trigger/event/interrupt is generated only on high-to-low transition of the polarity selected
If CPOL = 1 (inverted polarity):
Low-to-high transition of the comparator output.
If CPOL = 0 (non-inverted polarity):
High-to-low transition of the comparator output.
01 = Trigger/event/interrupt is generated only on low-to-high transition of the polarity-selected
If CPOL = 1 (inverted polarity):
High-to-low transition of the comparator output.
If CPOL = 0 (non-inverted polarity):
Low-to-high transition of the comparator output.
00 = Trigger/event/interrupt generation is disabled
Unimplemented: Read as ‘0’
R/W-0
R/W-0
COE
interrupts until the bit is cleared
IN
IN
IN
IN
comparator output (while CEVT = 0)
comparator output (while CEVT = 0)
CMxCON: COMPARATOR x CONTROL REGISTER
+ > V
+ < V
+ < V
+ > V
IN
IN
IN
IN
-
-
-
-
W = Writable bit
‘1’ = Bit is set
R/W-0
CPOL
U-0
—
R/W-0
CREF
U-0
—
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
U-0
U-0
—
—
U-0
U-0
—
—
x = Bit is unknown
R/W-0
R/W-0
CEVT
CCH<1:0>
DS70652E-page 233
R/W-0
COUT
R/W-0
bit 8
bit 0
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