dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 260

• Manufacturer Part Number: dsPIC33FJ32MC104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32MC104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

The Configuration Shadow register map is shown in
TABLE 23-1:
The Configuration Flash Word maps are shown in
TABLE 23-2:
TABLE 23-3:
CONFIG2 002BFC
CONFIG1 002BFE
Legend:
Note 1:
CONFIG2 0057FC
CONFIG1 0057FE
Legend:
Note 1:
F80004
F80006
F80008
F8000A
F8000C
F8000E
Legend:
Note 1:
Address
Name
Name
File
File
2:
3:
4:
2:
3:
4:
2:
3:
— = unimplemented, read as ‘1’.
During a Power-on Reset (POR), the contents of these Flash locations are transferred to the Configuration Shadow registers.
These bits are reserved on dsPIC33FJ16GP10X devices and read as ‘1’.
These bits are reserved, program as ‘0’.
This bit is reserved for use by development tools and must be programmed as ‘1’.
— = unimplemented, read as ‘1’.
During a Power-on Reset (POR), the contents of these Flash locations are transferred to the Configuration Shadow registers.
These bits are reserved in dsPIC33FJ32GP10X devices and read as ‘1’.
These bits are reserved, program as ‘0’.
This bit is reserved for use by development tools and must be programmed as ‘1’.
— = unimplemented, read as ‘1’.
These bits are available in dsPIC33FJ(16/32)MC10X devices only.
This bit is reserved for use by development tools.
These bits are reserved, program as ‘0’.
Addr.
Addr.
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
Name
Bits 23-16
Bits 23-16
CONFIGURATION SHADOW REGISTER MAP
CONFIGURATION FLASH WORDS FOR dsPIC33FJ16(GP/MC)10X DEVICES
CONFIGURATION FLASH WORDS FOR dsPIC33FJ32(GP/MC)10X DEVICES
—
—
—
—
PWMPIN
Reserved
Reserved
Reserved
FWDTEN
Bit 15
Bit 15
IESO
IESO
IESO
Bit 7
—
(1)
(2)
(3)
(3)
FCKSM<1:0>
PWMLOCK
PWMLOCK
Reserved
Reserved
Bit 14
Bit 14
PWMLOCK
(3)
(3)
WINDIS
HPOL
(2)
(2)
Bit 6
—
—
PWMPIN
PWMPIN
Table 23-2
(1)
Bit 13
Bit 13
Table
GCP
GCP
(1)
(2)
(2)
23-1.
GWRP
GWRP
Bit 12
Bit 12
and
Reserved
WDTWIN<1:0>
WDTWIN<1:0>
IOL1WAY
PLLKEN
LPOL
Bit 5
Table
—
—
(1)
Reserved
Reserved
(3)
Bit 11
Bit 11
23-3.
(4)
(4)
HPOL
HPOL
Bit 10
Bit 10
Reserved
WDTPRE
ALTI2C1
FNOSC<2:0>
FNOSC<2:0>
Bit 4
—
—
(2)
(2)
Bit 9 Bit 8
Bit 9 Bit 8
WDTWIN<1:0>
(3)
ICS<1:0>
ICS<1:0>
FWDTEN WINDIS
FWDTEN WINDIS
Bit 7
Bit 7
FCKSM<1:0>
FCKSM<1:0>
Bit 3
—
—
—
—
(1)
(1)
Bit 6
Bit 6
OSCIOFNC IOL1WAY LPOL
OSCIOFNC IOL1WAY LPOL
OSCIOFNC
PLLKEN
PLLKEN
Bit 5
Bit 5
Bit 2
—
—
—
WDTPOST<3:0>
WDTPRE
WDTPRE
Bit 4
Bit 4
FNOSC<2:0>
Bit 1
GCP
Bit 3
Bit 3
—
(2)
(2)
POSCMD<1:0>
ALTI2C1
WDTPOST<3:0>
ALTI2C1
WDTPOST<3:0>
ICS<1:0>
Bit 2
Bit 2
POSCMD<1:0>
POSCMD<1:0>
Bit 1
Bit 1
GWRP
Bit 0
—
Bit 0
Bit 0