MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 193

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MC9S12P64VQK

Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P64VQK

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12P64VQK
Manufacturer:
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Quantity:
10 000
S12SDBGV1 SCR encoding because OR possibilities are very limited in the channel encoding. By adding
OR forks as shown in red this scenario is possible.
On simultaneous matches the lowest channel number has priority so with this configuration the forking
from State1 has the peculiar effect that a simultaneous match0/match1 transitions to final state but a
simultaneous match2/match1transitions to state2.
6.5.9
Trigger when a routine/event at M2 follows either M1 or M0.
Trigger when an event M2 is followed by either event M0 or event M1
Scenario 8a and 8b are possible with the S12SDBGV1 and S12SDBGV2 SCR encoding
Freescale Semiconductor
SCR1=1101
SCR1=0111
SCR1=0010
State1
State1
State1
Scenario 8
M1
M01
M2
SCR2=1100
SCR2=0101
SCR2=0111
State2
State2
State2
S12P-Family Reference Manual, Rev. 1.13
M0
Figure 6-37. Scenario 8a
Figure 6-38. Scenario 8b
Figure 6-36. Scenario 7
M2
M2
M01
M02
Final State
Final State
SCR3=1101
State3
M01
M12
Final State
S12S Debug Module (S12SDBGV2)
193

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