MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 87

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MC9S12P64VQK

Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P64VQK

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12P64VQK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Read: Anytime. The data source is depending on the data direction value.
2.3.40
Freescale Semiconductor
Function
Address 0x0258
Write: Anytime
Altern.
Field
Reset
PTP
PTP
PTP
4-0
7
5
W
R
Port P general purpose input/output data—Data Register, pin interrupt input/output
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port P general purpose input/output data—Data Register, PWM input/output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port P general purpose input/output data—Data Register, PWM output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• Pin interrupts can be generated if enabled in input or output mode.
• The PWM function takes precedence over the general purpose I/O function if the related channel or the
• Pin interrupts can be generated if enabled in input or output mode.
• The PWM function takes precedence over the general purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
PTP7
Port P Data Register (PTP)
emergency shut-down feature is enabled.
0
7
0
0
6
Table 2-35. PTP Register Field Descriptions
Figure 2-38. Port P Data Register (PTP)
S12P-Family Reference Manual, Rev. 1.13
PWM5
PTP5
5
0
PWM4
PTP4
0
4
Description
PWM3
PTP3
0
3
PWM2
PTP2
0
2
Port Integration Module (S12PPIMV1)
Access: User read/write
PWM1
PTP1
0
1
PWM0
PTP0
0
0
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