MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 331

• Manufacturer Part Number: MC9S12P64VQK
• Description: 16-bit Microcontrollers - MCU 16 BIT 64K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12P64VQK

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 64 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to 105 C
• Package / Case: QFP-80
• Mounting Style: SMD/SMT
• Interface Type: I2C, SCI, SPI
• Program Memory Type: Flash

10.2.4
This pin serves as waveform output of PWM channel 2.
10.2.5
This pin serves as waveform output of PWM channel 1.
10.2.6
This pin serves as waveform output of PWM channel 0.
10.3
This subsection describes in detail all the registers and register bits in the PWM8B6CV1 module.
The special-purpose registers and register bit functions that would not normally be made available to
device end users, such as factory test control registers and reserved registers are clearly identified by means
of shading the appropriate portions of address maps and register diagrams. Notes explaining the reasons
for restricting access to the registers and functions are also explained in the individual register descriptions.
10.3.1
The following paragraphs describe the content of the registers in the PWM8B6CV1 module. The base
address of the PWM8B6CV1 module is determined at the MCU level when the MCU is defined. The
register decode map is fixed and begins at the first address of the module address offset.
the registers associated with the PWM and their relative offset from the base address. The register detail
description follows the order in which they appear in the register map.
Reserved bits within a register will always read as 0 and the write will be unimplemented. Unimplemented
functions are indicated by shading the bit.
Table 10-1
Freescale Semiconductor
Memory Map and Register Definition
Address
0x0000
0x0001
0x0002
0x0003
0x0004
Offset
shows the memory map for the PWM8B6CV1 module.
PWM2 — Pulse Width Modulator Channel 2 Pin
PWM1 — Pulse Width Modulator Channel 1 Pin
PWM0 — Pulse Width Modulator Channel 0 Pin
Module Memory Map
Register address = base address + address offset, where the base address is
defined at the MCU level and the address offset is defined at the module
level.
PWM Enable Register (PWME)
PWM Polarity Register (PWMPOL)
PWM Clock Select Register (PWMCLK)
PWM Prescale Clock Select Register (PWMPRCLK)
PWM Center Align Enable Register (PWMCAE)
Table 10-1. PWM8B6CV1 Memory Map
S12P-Family Reference Manual, Rev. 1.13
Register
NOTE
Pulse-Width Modulator (PWM8B6CV1) Block Description
Table 10-1
Access
R/W
R/W
R/W
R/W
R/W
shows
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