MC9S12P64VQK Freescale Semiconductor, MC9S12P64VQK Datasheet - Page 77

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MC9S12P64VQK

Manufacturer Part Number
MC9S12P64VQK
Description
16-bit Microcontrollers - MCU 16 BIT 64K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P64VQK

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
64 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to 105 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Interface Type
I2C, SCI, SPI
Program Memory Type
Flash

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12P64VQK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Read: Anytime The data source is depending on the data direction value.
2.3.24
2.3.25
Freescale Semiconductor
Function
Address 0x0248
Address 0x0249
Write: Anytime
Altern.
Field
Reset
PTS
PTS
PTS
Reset
3-2
1
0
W
W
R
R
Port S general purpose input/output data—Data Register
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SCI TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SCI RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI function takes precedence over the general purpose I/O function if enabled.
• The SCI function takes precedence over the general purpose I/O function if enabled.
Port S Data Register (PTS)
Port S Input Register (PTIS)
0
0
0
u
7
7
= Unimplemented or Reserved
0
0
0
u
6
6
Table 2-21. PTS Register Field Descriptions
Figure 2-23. Port S Input Register (PTIS)
Figure 2-22. Port S Data Register (PTS)
S12P-Family Reference Manual, Rev. 1.13
5
0
0
5
0
u
0
0
0
u
4
4
Description
u = Unaffected by reset
PTIS3
PTS3
0
u
3
3
PTIS2
PTS2
0
u
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
PTIS1
PTS1
TXD
0
u
1
1
Access: User read
PTIS0
PTS0
RXD
0
u
0
0
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