C8051F964-A-GQ Silicon Labs, C8051F964-A-GQ Datasheet - Page 203
C8051F964-A-GQ
Manufacturer Part Number
C8051F964-A-GQ
Description
8-bit Microcontrollers - MCU 64KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F964-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
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Price
Company:
Part Number:
C8051F964-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
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SFR Definition 14.2. AES0DCFG: AES Data Configuration
SFR Address = 0xEA; SFR page = 0x2; Not bit-Addressable
Name
Reset
Bit
2:0
Type
1
Bit
OUTSEL[1:0]
XORIN
Name
R
7
0
DATA Select.
These bits select the output data source for the AES0YOUT sfr.
00: Direct AES Data
01: AES Data XOR with AES0XIN
10: Inverse Key
11: reserved
XOR Input Enable.
Setting this bit with enable the XOR data path on the AES input. If enabled,
AES0BIN will be XORed with the AES0XIN and the results will feed into the AES
data input. Clearing this bit to 0 will disable the XOR gate on the input. The con-
tents of AES0BIN will go directly into the AES data input.
R
6
0
DONE
R/W
5
0
BUSY
Rev. 0.5
R
4
0
Function
R/W
EN
3
0
R/W
2
OUTSEL[1:0]
0
C8051F96x
1
0
R/W
XORIN
0
0
203
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