MK60DN512VMC10 Freescale Semiconductor, MK60DN512VMC10 Datasheet

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... External watchdog monitor – Software watchdog – Low-leakage wakeup unit Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2012 Freescale Semiconductor, Inc. Document Number: K60P144M100SF2V2 Rev. 2, 12/2012 K60P144M100SF2V2 • Security and integrity modules – ...

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... USB full-/low-speed On-the-Go controller with on-chip transceiver – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Six UART modules – Secure Digital host controller (SDHC) – I2S module K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 2 Freescale Semiconductor, Inc. ...

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... Capacitance attributes........................................20 5.3 Switching specifications.....................................................20 5.3.1 Device clock specifications.................................20 5.3.2 General switching specifications.........................21 5.4 Thermal specifications.......................................................22 5.4.1 Thermal operating requirements.........................22 K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Table of Contents 5.4.2 Thermal attributes...............................................22 6 Peripheral operating requirements and behaviors....................23 6.1 Core modules....................................................................23 6.1.1 Debug trace timing specifications.......................23 6.1.2 JTAG electricals..................................................24 6 ...

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... Pinout........................................................................................72 8.1 K60 Signal Multiplexing and Pin Assignments..................72 K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 4 8.2 K60 Pinouts.......................................................................78 9 Revision History........................................................................80 Freescale Semiconductor, Inc. ...

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... Qualification status K## Kinetis family A Key attribute M Flash memory type K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. www.freescale.com and perform a part number search for Description • Fully qualified, general market flow • Prequalification • K60 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...

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... LQ = 144 LQFP ( mm) • 144 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Values Freescale Semiconductor, Inc. ...

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... An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. 3.3.1 Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...

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... V core supply DD voltage 3.5 Result of exceeding a rating Measured characteristic K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 8 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Max. Unit V Freescale Semiconductor, Inc. ...

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... Typical values are provided as design guidelines and are neither tested nor guaranteed. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Normal operating range Degraded operating range - No permanent failure - No permanent failure ...

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... Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

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... Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components. 4.4 Voltage and current operating ratings Symbol Description V Digital supply voltage DD K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page ...

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... Nonswitching electrical specifications K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 12 Min. Max. Unit — 185 mA –0.3 5.5 V –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Freescale Semiconductor, Inc. ...

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... If these limits cannot be observed then a current limiting resistor is required. The negative DC injection current limiting resistor is calculated as R=(V calculated as R=(V -V )/|I |. Select the larger of these two calculated resistances. IN AIO_MAX IC K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × V 0.75 × V — ...

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... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 14 supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1.74 1.84 1.94 2.04 — 0.97 900 Min. 0.8 Typ. Max. Unit Notes 1.1 1.5 V 2.56 2.64 V 2.70 2.78 V 2.80 2.88 V 2.90 2.98 V 3.00 3.08 V ±80 — mV 1.60 1.66 V 1.80 1.86 V 1.90 1.96 V 2.00 2.06 V 2.10 2.16 V ±60 — mV 1.00 1.03 V 1000 1100 μs Typ. Max. Unit Notes 1.1 1.5 V Freescale Semiconductor, Inc ...

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... All specifications except t POR assume this clock configuration: • CPU and system clocks = 100 MHz • Bus clock = 50 MHz • FlexBus clock = 50 MHz • Flash clock = 25 MHz K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. = -9mA V – 0 -3mA V – ...

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... Table continues on the next page... Max. Unit Notes 300 μs 1 112 μs 74 μs 73 μs 5.9 μs 5.8 μs 5 μs Max. Unit Notes See note — — — — Freescale Semiconductor, Inc. ...

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... I Average current with RTC and 32kHz disabled at DD_VBAT 3.0 V • @ –40 to 25°C • @ 70°C • @ 105°C K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Typ. — 0.77 — 0.74 — 2.45 — 6.61 — ...

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... Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 18 Min. Typ. Max. Unit — 0.57 0.67 μA — 0.90 1.2 μA — 2.4 3.5 μA — 0.67 0.94 μA — 1.0 1.4 μA — 2.7 3.9 μA Freescale Semiconductor, Inc. Notes 10 ...

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... ° MHz (crystal OSC K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 23 50–150 27 150–500 28 500– ...

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... VLPR mode — — Table continues on the next page... Min. Max. Unit — — Max. Unit Notes 100 MHz — MHz MHz — — 50 MHz 50 MHz 25 MHz 25 MHz 4 MHz 4 MHz Freescale Semiconductor, Inc. ...

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... Port rise and fall time (high drive strength) • Slew disabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD • Slew enabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. — — — — — — — — signals. Min. 1.5 100 16 ...

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... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 22 Min. — — — — 144 LQFP 144 MAPBGA 45 48 Table continues on the next page... Max. Unit Notes Min. Max. Unit –40 125 °C –40 105 °C Unit Notes °C/W 1 Freescale Semiconductor, Inc. ...

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... Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air). 6 Peripheral operating requirements and behaviors 6.1 Core modules K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 144 LQFP 144 Unit ...

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... TCLK cycle period K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 24 Frequency dependent Ts Th Table continues on the next page... Min. Max. Unit MHz 2 — — ns — — — — Min. Max. Unit 2.7 3.6 V MHz 1/J1 — ns Freescale Semiconductor, Inc. ...

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... TMS, TDI input data hold time after TCLK rise J11 TCLK low to TDO data valid J12 TCLK low to TDO high-Z K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Min. Max. Unit 50 — ...

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... Data outputs Figure 6. Boundary scan (JTAG) timing K60 Sub-Family Data Sheet, Rev. 2, 12/2012 Figure 5. Test clock input timing Min. Max. Unit 100 — — Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

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... TCLK J13 TRST 6.2 System modules There are no specifications necessary for the device's system modules. 6.3 Clock modules K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8. TRST timing ...

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... MHz — 5 MHz — — kHz — — kHz — 39.0625 kHz 25 MHz 2, 50 MHz 75 MHz 100 MHz — MHz 4, — MHz — MHz — MHz Freescale Semiconductor, Inc ...

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... BLPI) to PLL enabled (PBE, PEE crystal/resonator is being used as the reference, this specification assumes it is already running. 6.3.2 Oscillator electrical specifications This section provides the electrical characteristics of the module. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — ...

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... MΩ — MΩ — MΩ — MΩ — kΩ — kΩ — kΩ — kΩ Freescale Semiconductor, Inc. ...

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... When transitioning from FBE to FEI mode, restrict the frequency of the input clock so that, when it is divided by FRDIV, it remains within the limits of the DCO input clock frequency. 3. Proper PC board layout procedures must be followed to achieve specifications. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...

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... The voltage of the applied BAT Min. Typ. Max. 1.71 — 3.6 — 100 — — — 0.6 — Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz — BAT Freescale Semiconductor, Inc. Unit V MΩ ...

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... Program Once execution time pgmonce t Erase All Blocks execution time ersall t Verify Backdoor Access Key execution time vfykey K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 7.5 — 13 — 104 Min. Typ. ...

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... Freescale Semiconductor, Inc. 3 ...

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... Write endurance represents the number of writes to each FlexRAM location at -40°C ≤Tj ≤ 125°C influenced by the cycling endurance of the FlexNVM (same value as data flash) and the allocated EEPROM backup per subsystem. Minimum and typical values assume all byte-writes to FlexRAM. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...

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... Write_efficiency — • 0.25 for 8-bit writes to FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance (the following graph assumes 10,000 nvmcycd cycles) K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 36 EEESPLIT × EEESIZE × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc. ...

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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 1.71 3.6 — f ...

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... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 38 EP3 EP2 EP4 EP9 EP8 EP7 EP5 EP6 Figure 10. EzPort Timing Diagram Min. 2.7 — 20 — 0.5 8.5 0.5 Max. Unit Notes 3.6 V FB_CLK MHz — — — — Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1 ...

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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 40 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...

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... FB_TA FB_TSIZ[1:0] Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 AA=0 FB4 ...

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... Table 29 and 1 Max. Unit Notes — 3 +100 +100 DDA DDA V V SSA SSA — 31/ VREFH — VREFH kΩ 3 — 5 kΩ — 18.0 MHz 4 — 12.0 MHz 4 5 — 818.330 Ksps Freescale Semiconductor, Inc. ...

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... ADC electrical characteristics Table 28. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADC calculator tool ...

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... Notes 3 MHz ADACK f ADACK 6.1 MHz 7.3 MHz 9.5 MHz 4 ±6.8 LSB 5 ±2.1 4 -1.1 to +1.9 LSB 5 -0.3 to 0.5 4 -2.7 to +1.9 LSB 5 -0.7 to +0.5 4 -5.4 LSB V = ADIN V DDA -1 — LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — — dB — dB Freescale Semiconductor, Inc. ...

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... Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz. Figure 14. Typical ENOB vs. ADC_CLK for 16-bit differential mode K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...

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... VREF_OU VREF_OU VREF_OU — SSA V — SSA — 128 — 64 — 32 — 100 1.25 — Table continues on the next page... Max. Unit Notes 3 DDA V V DDA 4 — kΩ IN+ to IN- — — — Ω 5 — µs 6 Freescale Semiconductor, Inc. ...

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... I Input DC current DC_PGA Gain = =0.5V CM Gain =64 =0.1V CM K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 18.484 — 37.037 — MHz unless otherwise stated. Typical values are for ADCK PGAD Min. ...

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... V from 1.71 DDA to 3.6V 0.31 %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =100Hz in Freescale Semiconductor, Inc. ...

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... Supply voltage DD I Supply current, High-speed mode (EN=1, PMODE=1) DDHS I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 85 105 53 88 11.6 13.4 8.0 13.6 7.2 9.6 6.3 9 ...

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... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 50 Min. 1 — — — — V – 0.5 DD — — — –0.5 –0.3 -0.6V. DD Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA 3 — 0.5 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 51 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K60 Sub-Family Data Sheet, Rev. 2, 12/2012 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...

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... Calculated by a best fit curve from V 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...

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... Peripheral operating requirements and behaviors Figure 18. Typical INL error vs. digital code K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 54 Freescale Semiconductor, Inc. ...

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... VREF_OUT if the VREF_OUT functionality is being used for either an internal or external L reference. 2. The load capacitance should not exceed +/-25% of the nominal specified C the device. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1.71 3 ...

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... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ µ Notes Notes ...

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... TXCLK to TXD[3:0], TXEN, TXER invalid MII8 TXCLK to TXD[3:0], TXEN, TXER valid TXCLK (input) TXD[n:0] TXEN TXER Figure 20. MII transmit signal timing diagram K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — 35% 35 — ...

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... Universal Serial Bus Implementers Forum. For the most up-to-date standards, visit http://www.usb.org. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 58 MII2 MII1 MII3 MII4 Valid data Valid data Valid data Min. — 35% 35 — Freescale Semiconductor, Inc. Max. Unit 50 MHz 65% RMII_CLK period 65% RMII_CLK period — ns — ns — ...

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... LIM 1. Typical values assume VREGIN = 5.0 V, Temp = 25 °C unless otherwise stated. 2. Operating in pass-through mode: regulator output voltage equal to the input voltage minus a drop proportional to I K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. ...

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... BUS 2 — DS1 DS2 DS8 Data Last data First data DS5 DS6 First data Data Last data Max. Unit Notes 3 MHz — / SCK — — — ns — ns — ns DS4 Freescale Semiconductor, Inc. ...

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... Table 44. Master mode DSPI timing (full voltage range) Num Description Operating voltage Frequency of operation DS1 DSPI_SCK output cycle time K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 ...

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... Last data Description Max. Unit Notes ( SCK/2) — — 8.5 ns — ns — ns — ns DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BUS (t / SCK SCK/2) — — ns 3.2 — — ns — — Freescale Semiconductor, Inc. ...

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... Clock rise time TLH SD5 t Clock fall time THL SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK) K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS10 DS15 DS12 First data Data DS14 First data Data Card input clock Table continues on the next page ...

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... This section provides the operating performance over a limited operating voltage for the device in Normal Run, Wait and Stop modes. K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 64 (continued) SD3 SD2 SD1 SD6 SD7 SD8 Figure 26. SDHC timing Min. Max. Unit -5 6 — — ns Freescale Semiconductor, Inc. ...

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... Table 48. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes (limited voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 2.7 40 45% 80 45% — 0 — ...

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... S11 S12 S13 S15 S19 S16 S17 S18 Min. 1.71 Table continues on the next page... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Max. Unit — ns — — ns — ns — S16 S14 S16 Max. Unit 3.6 V Freescale Semiconductor, Inc. ...

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... Table 50. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes (full voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 40 45% 80 45% — -1.0 — ...

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... S11 S12 S13 S15 S19 S16 S17 S18 Min. 1.71 Table continues on the next page... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Max. Unit — ns — 20.6 — ns — ns — S16 S14 S16 Max. Unit 3.6 V Freescale Semiconductor, Inc. ...

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... Figure 31. I2S/SAI timing — master modes Table 52. I2S/SAI slave mode timing in VLPR, VLPW, and VLPS modes (full voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 62.5 45% 250 45% — 0 — 0 ...

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... Min. 1.71 1 — — Table continues on the next page... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Max. Unit — ns — — ns — ns — S16 S14 S16 Typ. Max. Unit Notes — 3 500 MHz 2, 1 1.8 MHz 2, Freescale Semiconductor, Inc ...

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... Time to do one complete measurement of the electrode. Sensitivity resolution of 0.0133 pF NSCN = 0, 1 electrode, EXTCHRG = 7. 13. REFCHRG=0, EXTCHRG=4, PS=7, NSCN=0F, LPSCNITV=F, LPO is selected (1 kHz), and fixed external capacitance of 20 pF. Data is captured with an average of 7 periods window. 7 Dimensions K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Typ. Max. — 1 — ...

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... PTE1/ SPI1_SOUT UART1_RX SDHC0_D0 LLWU_P0 PTE2/ SPI1_SCK UART1_CTS_ SDHC0_DCLK LLWU_P1 b PTE3 SPI1_SIN UART1_RTS_ SDHC0_CMD b PTE4/ SPI1_PCS0 UART3_TX SDHC0_D3 LLWU_P2 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CTS_ I2S0_MCLK b ALT5 ALT6 ALT7 EzPort I2C1_SDA RTC_CLKOUT I2C1_SCL SPI1_SIN SPI1_SOUT USB_SOF_ OUT Freescale Semiconductor, Inc. ...

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... CMP2_IN2/ CMP2_IN2/ CMP2_IN2/ ADC0_SE22 ADC0_SE22 ADC0_SE22 36 J3 ADC0_SE16/ ADC0_SE16/ ADC0_SE16/ CMP1_IN2/ CMP1_IN2/ CMP1_IN2/ ADC0_SE21 ADC0_SE21 ADC0_SE21 K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE7 UART3_RTS_ I2S0_RXD0 b PTE8 I2S0_RXD1 UART5_TX I2S0_RX_FS PTE9 I2S0_TXD1 UART5_RX I2S0_RX_ BCLK ...

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... PTA8 FTM1_CH0 PTA9 FTM1_CH1 MII0_RXD3 ALT5 ALT6 ALT7 EzPort EWM_OUT_b EWM_IN RTC_CLKOUT USB_CLKIN JTAG_TCLK/ EZP_CLK SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_TX_ JTAG_TRST_ BCLK b TRACE_ CLKOUT TRACE_D3 FTM1_QD_ TRACE_D2 PHA FTM1_QD_ TRACE_D1 PHB Freescale Semiconductor, Inc. ...

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... TSI0_CH7 84 G11 PTB3 ADC0_SE13/ ADC0_SE13/ TSI0_CH8 TSI0_CH8 85 G10 PTB4 ADC1_SE10 ADC1_SE10 86 G9 PTB5 ADC1_SE11 ADC1_SE11 K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA10 FTM2_CH0 MII0_RXD2 PTA11 FTM2_CH1 MII0_RXCLK PTA12 CAN0_TX FTM1_CH0 RMII0_RXD1/ MII0_RXD1 PTA13/ CAN0_RX ...

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... FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT_b FB_AD15 FTM2_QD_ PHA FB_OE_b FTM2_QD_ PHB FB_AD31 CMP0_OUT FB_AD30 CMP1_OUT FB_AD29 CMP2_OUT FB_AD28 FB_AD14 I2S0_TXD1 FB_AD13 I2S0_TXD0 FB_AD12 I2S0_TX_FS CLKOUT I2S0_TX_ BCLK FB_AD11 CMP1_OUT FB_AD10 CMP0_OUT FB_AD9 I2S0_MCLK FB_AD8 FB_AD7 FB_AD6 FTM2_FLT0 FB_AD5 Freescale Semiconductor, Inc. ...

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... VDD VDD VDD 136 A1 PTD7 DISABLED 137 C9 PTD8 DISABLED 138 B9 PTD9 DISABLED 139 B3 PTD10 DISABLED K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC11/ I2C1_SDA I2S0_RXD1 LLWU_P11 PTC12 UART4_RTS_ b PTC13 UART4_CTS_ b PTC14 UART4_RX PTC15 UART4_TX PTC16 ...

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... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. 78 ALT1 ALT2 ALT3 ALT4 PTD11 SPI2_PCS0 UART5_CTS_ SDHC0_ b CLKIN PTD12 SPI2_SCK SDHC0_D4 PTD13 SPI2_SOUT SDHC0_D5 PTD14 SPI2_SIN SDHC0_D6 PTD15 SPI2_PCS1 SDHC0_D7 ALT5 ALT6 ALT7 EzPort FB_A19 FB_A20 FB_A21 FB_A22 FB_A23 Freescale Semiconductor, Inc. ...

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... PGA1_DP/ADC1_DP0/ADC0_DP3 29 PGA1_DM/ADC1_DM0/ADC0_DM3 30 VDDA 31 VREFH 32 VREFL 33 VSSA 34 ADC1_SE16/CMP2_IN2/ADC0_SE22 35 ADC0_SE16/CMP1_IN2/ADC0_SE21 36 Figure 33. K60 144 LQFP Pinout Diagram K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Pinout 108 VDD 107 VSS 106 PTC3/LLWU_P7 105 PTC2 104 PTC1/LLWU_P6 103 PTC0 102 PTB23 101 PTB22 PTB21 ...

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... PTB19 PTB18 E PTB17 PTB16 PTB11 PTB10 F PTB9 PTB8 PTB7 PTB6 G PTB5 PTB4 PTB3 PTB2 PTB0/ H PTB1 PTA29 PTA28 LLWU_P5 PTA13/ J PTA27 PTA26 PTA25 LLWU_P4 K PTA12 PTA16 PTA17 PTA24 L PTA11 PTA14 PTA15 RESET_b M PTA10 VSS PTA19 PTA18 Freescale Semiconductor, Inc. ...

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... K60 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Revision History 81 ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...