MK60DN512VMC10 Freescale Semiconductor, MK60DN512VMC10 Datasheet - Page 49

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MK60DN512VMC10

Manufacturer Part Number
MK60DN512VMC10
Description
ARM Microcontrollers - MCU Kinetis 2.x 512K
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK60DN512VMC10

Rohs
yes
Core
ARM Cortex M4
Processor Series
MK60DN512
Data Bus Width
32 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
MAPBGA-121
Mounting Style
SMD/SMT
A/d Bit Size
16 bit
A/d Channels Available
2
Interface Type
CAN, I2C, I2S, SPI, UART, USB
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Timers
2
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.71 V
1. Typical values assume V
2. This current is a PGA module adder, in addition to ADC conversion currents.
3. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
4. Gain = 2
5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored.
6. Limit the input signal swing so that the PGA does not saturate during operation. Input signal swing is dependent on the
6.6.2 CMP and 6-bit DAC electrical specifications
Freescale Semiconductor, Inc.
Symbol
SINAD
Symbol
ENOB
SFDR
function of input common mode voltage (V
PGA reference voltage and gain setting.
I
I
V
V
V
DDHS
DDLS
AIN
AIO
DD
PGAG
Spurious free
dynamic range
Effective number
of bits
Signal-to-noise
plus distortion
ratio
Description
Supply voltage
Supply current, High-speed mode (EN=1, PMODE=1)
Supply current, low-speed mode (EN=1, PMODE=0)
Analog input voltage
Analog input offset voltage
Description
Table 31. Comparator and 6-bit DAC electrical specifications
Table 30. 16-bit ADC with PGA characteristics (continued)
DDA
=3.0V, Temp=25°C, f
See ENOB
Conditions
K60 Sub-Family Data Sheet, Rev. 2, 12/2012.
• Gain=1
• Gain=64
• Gain=1, Average=4
• Gain=1, Average=8
• Gain=64, Average=4
• Gain=64, Average=8
• Gain=1, Average=32
• Gain=2, Average=32
• Gain=4, Average=32
• Gain=8, Average=32
• Gain=16, Average=32
• Gain=32, Average=32
• Gain=64, Average=32
Table continues on the next page...
CM
) and the PGA gain.
ADCK
=6MHz unless otherwise stated.
11.6
12.8
11.0
Min.
8.0
7.2
6.3
7.9
7.3
6.8
6.8
7.5
85
53
6.02 × ENOB + 1.76
V
Peripheral operating requirements and behaviors
SS
1.71
Min.
– 0.3
Typ.
13.4
13.6
14.5
14.3
13.8
13.1
12.5
11.5
10.6
105
9.6
9.6
88
1
Typ.
Max.
Unit
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
dB
dB
dB
Max.
V
200
3.6
20
20
DD
mode,f
Average=32,
differential
differential
f
in
mode,
Notes
=100Hz
16-bit
16-bit
in
Unit
mV
=100Hz
μA
μA
V
V
49

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