92HD90B0X5NLGXYAX8 IDT, 92HD90B0X5NLGXYAX8 Datasheet - Page 27
92HD90B0X5NLGXYAX8
Manufacturer Part Number
92HD90B0X5NLGXYAX8
Description
Interface - CODECs
Manufacturer
IDT
Datasheet
1.92HD90B0X5NLGXYAX8.pdf
(303 pages)
Specifications of 92HD90B0X5NLGXYAX8
Rohs
yes
Part # Aliases
IDT92HD90B0X5NLGXYAX8
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92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Power State
Digital
Mics
D1-D3
D0-D3
0
1
2
3
4
D0
D4
D5
Single Edge on the
either DMIC_0 or 1
one DMIC pin and
second DMIC pin.
Double Edge on
Double Edge on
Data Sample
Double Edge
DMIC Widget
Single Edge
Enabled?
N/A
Yes
Yes
No
-
-
analog ports. Although the internal implementation is different between the analog ports and the dig-
ital microphones, the functionality is the same. In most cases, the default values for the DMIC clock
rate and data sample phase will be appropriate and an audio driver will be able to configure and use
the digital microphones exactly like an analog microphone.
To conserve power, the analog portion of the ADC will be turned off if the D-mic input is selected.
When switching from the digital microphone to an analog input to the ADC, the analog portion of the
ADC will be brought back to a full power state and allowed to stabilize before switching from the dig-
ital microphone to the analog input. This should take less than 10mS.
DMIC pin widgets support port presence detect directly using SENSE-B input.
The codec supports the following digital microphone configurations:
Table 17. DMIC_CLK and DMIC_0,1 Operation During Power States
Clock Disabled
Clock Disabled
Clock Disabled
Clock Disabled
Clock Capable
DMIC_CLK
Conn.
0, or 1
0, or 1
0, or 1
0, or 1
Output
ADC
N/A
Table 16. Valid Digital Mic Configurations
Available on either DMIC_0 or DMIC_1, External logic required to support sampling on a
common data line), configure the microphone for “Left” and select mono operation using
Requires both DMIC_0 and DMIC_1, External logic required to support sampling on a
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge (multiplexed output) capability. Two ADC units are required to support this
Connected to DMIC_0 and DMIC_1, External logic required to support sampling on a
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
When using a microphone that supports multiplexed operation (2-mics can share a
Input Disabled
Input Disabled
Input Disabled
Input Disabled
Input Capable
clock edge capability. Two ADC units are required to support this configuration
DMIC_0,1
“Left” D-mic data is used for ADC left and right channels.
27
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
clock edge (multiplexed output) capability.
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Available on either DMIC_0 or DMIC_1
the vendor specific verb.
No Digital Microphones
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
configuration
Notes
Notes
V 1.2 3/12
92HD98
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