92HD90B0X5NLGXYAX8 IDT, 92HD90B0X5NLGXYAX8 Datasheet - Page 66

• Manufacturer Part Number: 92HD90B0X5NLGXYAX8
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of 92HD90B0X5NLGXYAX8

• Rohs: yes
• Part # Aliases: IDT92HD90B0X5NLGXYAX8

92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Rsvd
Data4
Data3
Data2
Data1
Data0
Field Name
Rsvd
Reg
Get
Set
7.4.12. AFG (NID = 01h): GPIOEn
Byte 4 (Bits 31:24)
Bits
31:5
Reserved.
4
Data for GPIO4. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
3
Data for GPIO3. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
2
Data for GPIO2. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
1
Data for GPIO1. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
0
Data for GPIO0. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
Bits
31:5
Reserved.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
R/W
R
F1600h
Default
00000000h
0h
0h
0h
0h
0h
Default
00000000h
61
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
Byte 1 (Bits 7:0)
716h
V 1.2 3/12
92HD98