74LVC08APW-Q100,11 NXP Semiconductors, 74LVC08APW-Q100,11 Datasheet - Page 3

• Manufacturer Part Number: 74LVC08APW-Q100,11
• Description: Logic Gates
• Manufacturer: NXP Semiconductors

Specifications of 74LVC08APW-Q100,11

• Rohs: yes
• Product: AND
• Logic Family: 74LVC
• Number Of Gates: 4
• Number Of Lines (input / Output): 2 /
• Propagation Delay Time: 10.4 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 50 mA
• Power Dissipation: 500 mW

NXP Semiconductors
5. Pinning information
Table 2.
6. Functional description
Table 3.
[1]
74LVC08A_Q100
Product data sheet
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
V
Input
nA
L
X
H
Fig 4. Pin configuration SO14 and TSSOP14
CC
H = HIGH voltage level; L = LOW voltage level; X = don’t care
Pin description
Function selection
*1'
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5.1 Pinning
5.2 Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8,11
7
14







/9&$4
DDD
[1]
Description
data output
data input
data input
ground (0 V)
supply voltage






nB
X
L
H
All information provided in this document is subject to legal disclaimers.
9
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&&
Rev. 1 — 31 July 2012
Fig 5. Pin configuration DHVQFN14
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
LQGH[ DUHD
WHUPLQDO 
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Output
nY
L
L
H
74LVC08A-Q100
7UDQVSDUHQW WRS YLHZ
/9&$4





*1'

Quad 2-input AND gate




DDD
© NXP B.V. 2012. All rights reserved.
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