DS3172N Maxim Integrated, DS3172N Datasheet - Page 150
![no-image](/images/no-image-200.jpg)
DS3172N
Manufacturer Part Number
DS3172N
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172N
Part # Aliases
90-31720-N00
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 3: Performance Monitoring Update Status Interrupt Enable (PMSIE) – This bit enables an interrupt if the
PMSL bit is set.
Bit 2: Bit Error Interrupt Enable (BEIE) – This bit enables an interrupt if the BEL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 1: Bit Error Count Interrupt Enable (BECIE) – This bit enables an interrupt if the BECL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 0: Out Of Synchronization Interrupt Enable (OOSIE) – This bit enables an interrupt if the OOSL bit is set and
the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Bit Error Count (BEC[15:0]) – Lower sixteen bits of 24 bits. Register description follows next
register.
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
BEC15
BEC7
15
15
--
--
0
7
0
0
7
0
BEC14
BEC6
14
14
--
--
0
6
0
0
6
0
BERT.SRIE
BERT Status Register Interrupt Enable
(0,2,4,6)70h
BERT.RBECR1
BERT Receive Bit Error Count Register #1
(0,2,4,6)74h
BEC13
BEC5
13
13
--
--
0
5
0
0
5
0
BEC12
BEC4
12
12
--
--
0
0
0
0
4
4
150
PMSIE
BEC11
BEC3
11
11
--
0
3
0
0
3
0
BEC10
BEC2
BEIE
10
10
--
0
2
0
0
2
0
BECIE
BEC9
BEC1
--
9
0
1
0
9
0
1
0
OOSIE
BEC8
BEC0
--
8
0
0
0
8
0
0
0
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