74LVC2G38DP-G NXP Semiconductors, 74LVC2G38DP-G Datasheet - Page 12
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74LVC2G38DP-G
Manufacturer Part Number
74LVC2G38DP-G
Description
Logic Gates 3.3V DUAL 2-IN NAND BUF OPEN-D
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G38GS115.pdf
(21 pages)
Specifications of 74LVC2G38DP-G
Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
Low Level Output Current
32 mA
Propagation Delay Time
2.1 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G38DP,125
NXP Semiconductors
Fig 12. Package outline SOT833-1 (XSON8)
74LVC2G38
Product data sheet
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
SOT833-1
VERSION
OUTLINE
max
A
terminal 1
index area
0.5
e
(1)
8×
(2)
max
0.04
L
A
1
1
0.25
0.17
b
IEC
- - -
1
8
2.0
1.9
D
e
1
1.05
0.95
E
0
2
7
MO-252
JEDEC
0.6
All information provided in this document is subject to legal disclaimers.
e
e
D
REFERENCES
1
0.5
e
1
Rev. 10 — 28 June 2012
3
6
0.35
0.27
L
JEITA
e
- - -
1
0.40
0.32
scale
L
1
1
b
4
5
A
L
1
E
A
Dual 2-input NAND gate; open drain
4×
(2)
2 mm
PROJECTION
EUROPEAN
74LVC2G38
© NXP B.V. 2012. All rights reserved.
ISSUE DATE
07-11-14
07-12-07
SOT833-1
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