74LVC2G38DP-G NXP Semiconductors, 74LVC2G38DP-G Datasheet - Page 18

no-image

74LVC2G38DP-G

Manufacturer Part Number
74LVC2G38DP-G
Description
Logic Gates 3.3V DUAL 2-IN NAND BUF OPEN-D
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2G38DP-G

Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
Low Level Output Current
32 mA
Propagation Delay Time
2.1 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G38DP,125
NXP Semiconductors
14. Abbreviations
Table 11.
15. Revision history
Table 12.
74LVC2G38
Product data sheet
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Document ID
74LVC2G38 v.10
Modifications:
74LVC2G38 v.9
Modifications:
74LVC2G38 v.8
74LVC2G38 v.7
74LVC2G38 v.6
74LVC2G38 v.5
74LVC2G38 v.4
74LVC2G38 v.3
74LVC2G38 v.2
74LVC2G38 v.1
Abbreviations
Revision history
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20120628
20111128
20101104
20090320
20080219
20070904
20060516
20050201
20041018
20031027
For type number 74LVC2G38GM the SOT code has changed to SOT902-2.
Legal pages updated.
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product specification
Product specification
Product specification
Rev. 10 — 28 June 2012
Change notice
-
-
-
-
-
-
-
-
-
-
Dual 2-input NAND gate; open drain
74LVC2G38
Supersedes
74LVC2G38 v.9
74LVC2G38 v.8
74LVC2G38 v.7
74LVC2G38 v.6
74LVC2G38 v.5
74LVC2G38 v.4
74LVC2G38 v.3
74LVC2G38 v.2
74LVC2G38 v.1
-
© NXP B.V. 2012. All rights reserved.
18 of 21

Related parts for 74LVC2G38DP-G