74LVC2G38DP-G NXP Semiconductors, 74LVC2G38DP-G Datasheet - Page 9
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74LVC2G38DP-G
Manufacturer Part Number
74LVC2G38DP-G
Description
Logic Gates 3.3V DUAL 2-IN NAND BUF OPEN-D
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G38GS115.pdf
(21 pages)
Specifications of 74LVC2G38DP-G
Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
Low Level Output Current
32 mA
Propagation Delay Time
2.1 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G38DP,125
NXP Semiconductors
Table 10.
74LVC2G38
Product data sheet
Supply voltage
V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 9.
CC
Test data is given in
Definitions for test circuit:
R
C
R
V
Test circuit for measuring switching times
EXT
L
L
T
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
= External voltage for measuring switching times.
Input
V
V
V
2.7 V
2.7 V
V
I
CC
CC
CC
Table 10
negative
positive
pulse
pulse
GENERATOR
0 V
0 V
V
V
I
I
PULSE
t
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
All information provided in this document is subject to legal disclaimers.
r
, t
90 %
10 %
f
Rev. 10 — 28 June 2012
t
t
r
f
V
V
V
M
M
10 %
90 %
I
R T
Load
C
30 pF
30 pF
50 pF
50 pF
50 pF
L
V
DUT
t
t
W
W
CC
o
of the pulse generator.
V
O
V
V
M
M
t
t
r
f
C L
Dual 2-input NAND gate; open drain
001aae235
V
R
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
EXT
L
R L
R L
74LVC2G38
© NXP B.V. 2012. All rights reserved.
V
t
2 × V
2 × V
6 V
6 V
2 × V
PLZ
EXT
, t
CC
CC
CC
PZL
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