74LVC2G38DP-G NXP Semiconductors, 74LVC2G38DP-G Datasheet - Page 13
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74LVC2G38DP-G
Manufacturer Part Number
74LVC2G38DP-G
Description
Logic Gates 3.3V DUAL 2-IN NAND BUF OPEN-D
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G38GS115.pdf
(21 pages)
Specifications of 74LVC2G38DP-G
Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
Low Level Output Current
32 mA
Propagation Delay Time
2.1 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G38DP,125
NXP Semiconductors
Fig 13. Package outline SOT1089 (XSON8)
74LVC2G38
Product data sheet
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1089
Unit
Outline
version
max
nom
min
A
0.5
(1)
0.04
A
terminal 1
index area
1
terminal 1
index area
0.20
0.15
0.12
(4×)
b
IEC
b
(2)
1.40
1.35
1.30
4
1
D
1.05
1.00
0.95
E
L
1
0.55 0.35
MO-252
JEDEC
e
All information provided in this document is subject to legal disclaimers.
E
e
e
1
References
L
0
0.35
0.30
0.27
Rev. 10 — 28 June 2012
L
5
8
0.40
0.35
0.32
L
1
e
JEITA
D
1
scale
0.5
A
1 mm
(8×)
A
1
(2)
detail X
Dual 2-input NAND gate; open drain
European
projection
X
74LVC2G38
© NXP B.V. 2012. All rights reserved.
Issue date
10-04-09
10-04-12
sot1089_po
SOT1089
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