74LVC2G38DP-G NXP Semiconductors, 74LVC2G38DP-G Datasheet - Page 8
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74LVC2G38DP-G
Manufacturer Part Number
74LVC2G38DP-G
Description
Logic Gates 3.3V DUAL 2-IN NAND BUF OPEN-D
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G38GS115.pdf
(21 pages)
Specifications of 74LVC2G38DP-G
Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
Low Level Output Current
32 mA
Propagation Delay Time
2.1 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G38DP,125
NXP Semiconductors
12. Waveforms
Table 9.
74LVC2G38
Product data sheet
Supply voltage
V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 8.
CC
Measurement points are given in
Inputs nA and nB to output nY propagation delay times
Measurement points
nA, nB input
Input
V
0.5 × V
0.5 × V
1.5 V
1.5 V
0.5 × V
nY output
M
CC
CC
CC
Table 9
GND
V
V
All information provided in this document is subject to legal disclaimers.
CC
OL
V
I
Rev. 10 — 28 June 2012
V
t
M
PLZ
V
X
Output
V
V
V
V
V
V
X
OL
OL
OL
OL
OL
+ 0.15 V
+ 0.15 V
+ 0.3 V
+ 0.3 V
+ 0.3 V
t
PZL
Dual 2-input NAND gate; open drain
V
M
mnb132
V
0.5 × V
0.5 × V
1.5 V
1.5 V
0.5 × V
M
74LVC2G38
CC
CC
CC
© NXP B.V. 2012. All rights reserved.
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