MCIMX6S5DVM10AB Freescale Semiconductor, MCIMX6S5DVM10AB Datasheet - Page 24

• Manufacturer Part Number: MCIMX6S5DVM10AB
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S5DVM10AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 256 kB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Mounting Style: SMD/SMT
• Package / Case: FCBGA-624
• Interface Type: I2C, I2S, SDIO, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM

Electrical Characteristics
4.1.3
Table 9
power structure, see the “Power Management Unit (PMU)” chapter of the i.MX 6Solo/6DualLite Reference
Manual (IMX6SDLRM).
24
Run mode: LDO
enabled
Run mode: LDO
bypassed
Standby/DSM mode
VDDHIGH internal
regulator
Backup battery supply
range
USB supply voltages
DDR I/O supply voltage
Supply for RGMII I/O
power group
Description
Parameter
provides the operating ranges of the i.MX 6Solo/6DualLite processors. For details on the chip's
6
Operating Ranges
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
USB_OTG_VBUS
VDD_SNVS_IN
USB_H1_VBUS
VDDSOC_IN
NVCC_DRAM
NVCC_RGMII
VDDHIGH_IN
VDDARM_IN
VDDARM_IN
VDDSOC_IN
VDDARM_IN
VDDSOC_IN
Symbol
3
5
1.275
Table 9. Operating Ranges
1.350
1.275
1.175
1.250
1.150
1.425
1.283
1.15
1.05
1.14
1.15
Min
2.9
4.4
4.4
0.9
0.9
2.8
2,4
4
2
2
2
1.35
Typ
1.2
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.225
1.575
Max
1.225
2.625
5.25
5.25
1.45
1.5
1.5
1.5
1.5
1.3
1.3
1.3
1.3
3.3
3.3
1.3
1
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDR3
DDR3_L
LDO Output Set Point (VDDARM_CAP) =
1.225 V minimum for operation up to 996 MHz.
LDO Output Set Point (VDDARM_CAP) =
1.150 V minimum for operation up to 792 MHz.
LDO Output Set Point (VDDARM_CAP) = 1.05
V minimum for operation up to 396 MHz.
VPU </= 328 MHz, VDDSOC and VDDPU LDO
outputs (VDDSOC_CAP and VDDPU_CAP) =
1.225 V maximum and 1.15 V minimum.
LDO bypassed for operation up to 996 MHz
LDO bypassed for operation up to 792 MHz
LDO bypassed for operation up to 396 MHz
Refer to
Power Consumption," on page
Must match the range of voltges that the
rechargeable backup battery supports.
Should be supplied from the same supply as
VDDHIGH_IN if the system does not require
keeping real time and other data on OFF state.
LPDDR2, DDR3-U
1.15 V – 1.30 V in HSIC 1.2 V mode
1.43 V – 1.58 V in RMGII 1.5 V mode
1.70 V – 1.90 V in RMGII 1.8 V mode
2.25 V – 2.625 V in RMGII 2.5 V mode
LDO bypassed for operation VPU </= 328 MHz
Table 13, "Stop Mode Current and
Comment
Freescale Semiconductor
29.