MCIMX6S5DVM10AB Freescale Semiconductor, MCIMX6S5DVM10AB Datasheet - Page 33

• Manufacturer Part Number: MCIMX6S5DVM10AB
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S5DVM10AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 256 kB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Mounting Style: SMD/SMT
• Package / Case: FCBGA-624
• Interface Type: I2C, I2S, SDIO, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM

their input supply ripple rejection and their on-die trimming. This translates into more stable voltage for
the on-chip logics.
These regulators have three basic modes:
For additional information, see the i.MX 6Solo/6DualLite reference manual.
4.3.2
4.3.2.1
The LDO_1P1 regulator implements a programmable linear-regulator function from VDDHIGH_IN (see
Table 9
to 1.2 V with the nominal default setting as 1.1 V. Since the accuracy or the % regulation is not tested, and
only tested with the LDO set to either 1.0V or 1.2V, this is the only range that is guaranteed. The regulator
has been designed to be stable with a minimum external low ESR decoupling capacitor of 1 µF (2.2 µF
should be considered the recommended minimum value for component selection), though the actual
capacitance required should be determined by the application. A programmable brown-out detector is
included in the regulator that can be used by the system to determine when the load capability of the
regulator is being exceeded to take the necessary steps. Current-limiting can be enabled to allow for in-rush
current requirements during start-up, if needed. Active-pull-down can also be enabled for systems
requiring this feature.
For additional information, see the i.MX 6Solo/6DualLite reference manual.
4.3.2.2
The LDO_2P5 module implements a programmable linear-regulator function from VDDHIGH_IN (see
Table 9
V to 2.75 V with the nominal default setting as 2.5 V. Since the accuracy or the % regulation is not tested,
and only tested with the LDO set to either 2.25V or 2.75V, this is the only range that is guaranteed. The
regulator has been designed to be stable with a minimum external low ESR decoupling capacitor of 1 µF
(2.2 µF should be considered the recommended minimum value for component selection), though the
actual capacitance required should be determined by the application. A programmable brown-out detector
is included in the regulator that can be used by the system to determine when the load capability of the
regulator is being exceeded, to take the necessary steps. Current-limiting can be enabled to allow for
in-rush current requirements during start-up, if needed. Active-pull-down can also be enabled for systems
requiring this feature. An alternate self-biased low-precision weak-regulator is included that can be
Freescale Semiconductor
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Bypass. The regulation FET is switched fully on passing the external voltage, to the load unaltered.
The analog part of the regulator is powered down in this state, removing any loss other than the IR
drop through the power grid and FET.
Power Gate. The regulation FET is switched fully off limiting the current draw from the supply.
The analog part of the regulator is powered down here limiting the power consumption.
Analog regulation mode. The regulation FET is controlled such that the output voltage of the
regulator equals the programmed target voltage. The target voltage is fully programmable in 25 mV
steps.
for minimum and maximum input requirements). Typical Programming Operating Range is 1.0 V
for minimum and maximum input requirements). Typical Programming Operating Range is 2.25
Analog Regulators
LDO_1P1
LDO_2P5
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
Electrical Characteristics
33