MCIMX6D4AVT10ACR Freescale Semiconductor, MCIMX6D4AVT10ACR Datasheet - Page 128

• Manufacturer Part Number: MCIMX6D4AVT10ACR
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D4AVT10ACR

• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 256 KB
• Operating Supply Voltage: 1.05 V to 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: FCBGA-624
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
128
SS10
SS12
SS14
SS15
SS16
SS17
SS18
SS42
SS43
SS1
SS2
SS4
SS6
SS8
ID
AUDx_TXC/AUDx_RXC clock period
AUDx_TXC/AUDx_RXC clock high period
AUDx_TXC/AUDx_RXC clock low period
AUDx_TXC high to AUDx_TXFS (bl) high
AUDx_TXC high to AUDx_TXFS (bl) low
AUDx_TXC high to AUDx_TXFS (wl) high
AUDx_TXC high to AUDx_TXFS (wl) low
AUDx_TXC/AUDx_RXC Internal AUDx_TXFS rise time
AUDx_TXC/AUDx_RXC Internal AUDx_TXFS fall time
AUDx_TXC high to AUDx_TXD valid from high impedance
AUDx_TXC high to AUDx_TXD high impedance
AUDx_RXD setup before AUDx_TXC falling
AUDx_RXD hold after AUDx_TXC falling
AUDx_TXC high to AUDx_TXD high/low
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i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
AUDx_TXC/AUDx_RXC and/or the frame sync
AUDx_TXFS/AUDx_RXFS shown in the tables and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
The terms, WL and BL, refer to Word Length(WL) and Bit Length(BL).
For internal Frame Sync operation using external clock, the frame sync
timing is the same as that of transmit data (for example, during AC97
mode of operation).
Table 87. SSI Transmitter Timing with Internal Clock
Parameter
Synchronous Internal Clock Operation
Internal Clock Operation
NOTE
81.4
36.0
36.0
10.0
Min
0.0
—
—
—
—
—
—
—
—
—
15.0
15.0
15.0
15.0
15.0
15.0
15.0
Max
6.0
6.0
Freescale Semiconductor
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns