MCIMX6D4AVT10ACR Freescale Semiconductor, MCIMX6D4AVT10ACR Datasheet - Page 87

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MCIMX6D4AVT10ACR

Manufacturer Part Number
MCIMX6D4AVT10ACR
Description
Processors - Application Specialized i.MX6D
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6D4AVT10ACR

Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
256 KB
Operating Supply Voltage
1.05 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FCBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
4.11.5.2 RMII Mode Timing
In RMII mode, ENET_CLK is used as the REF_CLK, which is a 50 MHz ± 50 ppm continuous reference
clock. ENET_RX_EN is used as the ENET_RX_EN in RMII. Other signals under RMII mode include
ENET_TX_EN, ENET0_TXD[1:0], ENET_RXD[1:0] and ENET_RX_ER.
Figure 52
figure.
Freescale Semiconductor
M16
M17
M18
M19
M20
M21
ID
ENET0_TXD[1:0] (output)
ENET_RX_EN (input)
ENET_CLK pulse width high
ENET_CLK pulse width low
ENET_CLK to ENET0_TXD[1:0], ENET_TX_EN invalid
ENET_CLK to ENET0_TXD[1:0], ENET_TX_EN valid
ENET_RXD[1:0], ENET_RX_EN(ENET_RX_EN), ENET_RX_ER to
ENET_CLK setup
ENET_CLK to ENET_RXD[1:0], ENET_RX_EN, ENET_RX_ER hold
shows RMII mode timings.
ENET_CLK (input)
ENET_RXD[1:0]
ENET_RX_ER
ENET_TX_EN
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
Figure 52. RMII Mode Signal Timing Diagram
Characteristic
Table 62
Table 62. RMII Signal Timing
M20
M18
M21
M19
describes the timing parameters (M16–M21) shown in the
M16
M17
35%
35%
Min
2
4
4
65%
65%
Max
Electrical Characteristics
15
ENET_CLK period
ENET_CLK period
Unit
ns
ns
ns
ns
87

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