C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 130

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C8051T622-GMR

Manufacturer Part Number
C8051T622-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T622-GMR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051

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Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T622-GMR
Manufacturer:
SILICON
Quantity:
5 000
C8051T622/3 and C8051T326/7
USB Register Definition 18.9. FRAMEL: USB0 Frame Number Low
USB Register Address = 0x0C
USB Register Definition 18.10. FRAMEH: USB0 Frame Number High
USB Register Address = 0x0D
18.8. Interrupts
The read-only USB0 interrupt flags are located in the USB registers shown in USB Register
Definition 18.11 through USB Register Definition 18.13. The associated interrupt enable bits are located in
the USB registers shown in USB Register Definition 18.14 through USB Register Definition 18.16. A USB0
interrupt is generated when any of the USB interrupt flags is set to 1. The USB0 interrupt is enabled via the
EIE1 SFR (see Section “12. Interrupts” on page 60).
Important Note: Reading a USB interrupt flag register resets all flags in that register to 0.
130
Name
Reset
Name
Reset
7:0 FRMEL[7:0] Frame Number Low Bits.
7:3
2:0 FRMEH[2:0] Frame Number High Bits.
Bit
Bit
Type
Type
Bit
Bit
Unused
Name
Name
R
7
0
7
0
This register contains bits 7-0 of the last received frame number.
Unused. Read = 00000b. Write = don’t care.
This register contains bits 10-8 of the last received frame number.
R
6
0
6
0
R
5
0
5
0
Rev. 1.1
R
4
0
4
0
FRMEL[7:0]
R
Function
Function
R
3
0
3
0
2
0
2
0
FRMEH[2:0]
R
1
0
1
0
0
0
0
0

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