C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 25

• Manufacturer Part Number: C8051T622-GMR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
• Manufacturer: Silicon Labs

Specifications of C8051T622-GMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A 2x2 array of 1.10 mm x 1.10 mm openings on a 1.30 mm pitch should be used for the center
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
C1
C2
X1
E
mask and the metal pad is to be 60 m minimum, all the way around the pad.
to assure good solder paste release.
pad.
Body Components.
Figure 4.2. QFN-24 Recommended PCB Land Pattern
Table 4.2. QFN-24 PCB Land Pattern Dimesions
3.90
3.90
0.20
Min
0.50 BSC
C8051T622/3 and C8051T326/7
Max
4.00
4.00
0.30
Rev. 1.1
Dimension
X2
Y1
Y2
2.70
0.65
2.70
Min
2.80
Max
2.80
0.75
25