C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 181

• Manufacturer Part Number: C8051T622-GMR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
• Manufacturer: Silicon Labs

Specifications of C8051T622-GMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

bit length is selectable between short (1 bit time) and long (1.5 or 2 bit times), and a multi-processor com-
munication mode is available for implementing networked UART buses. All of the data formatting options
can be configured using the SMOD1 register, shown in SFR Definition . Figure 21.2 shows the timing for a
UART1 transaction without parity or an extra bit enabled. Figure 21.3 shows the timing for a UART1 trans-
action with parity enabled (PE1 = 1). Figure 21.4 is an example of a UART1 transaction when the extra bit
is enabled (XBE1 = 1). Note that the extra bit feature is not available when parity is enabled, and the sec-
ond stop bit is only an option for data lengths of 6, 7, or 8 bits.
21.3. Configuration and Operation
UART1 provides standard asynchronous, full duplex communication. It can operate in a point-to-point
serial communications application, or as a node on a multi-processor serial interface. To operate in a point-
to-point application, where there are only two devices on the serial bus, the MCE1 bit in SMOD1 should be
cleared to 0. For operation as part of a multi-processor communications bus, the MCE1 and XBE1 bits
should both be set to 1. In both types of applications, data is transmitted from the microcontroller on the
TX1 pin, and received on the RX1 pin. The TX1 and RX1 pins are configured using the crossbar and the
Port I/O registers, as detailed in Section “17. Port Input/Output” on page 97.
SPACE
SPACE
MARK
MARK
BIT TIMES
BIT TIMES
SPACE
MARK
BIT TIMES
START
START
BIT
BIT
START
Figure 21.2. UART1 Timing Without Parity or Extra Bit
BIT
D
D
0
0
Figure 21.4. UART1 Timing With Extra Bit
Figure 21.3. UART1 Timing With Parity
D
0
D
D
1
1
N bits; N = 5, 6, 7, or 8
N bits; N = 5, 6, 7, or 8
C8051T622/3 and C8051T326/7
D
1
N bits; N = 5, 6, 7, or 8
Rev. 1.1
D
D
N-2
N-2
D
N-2
D
D
N-1
N-1
D
N-1
PARITY
EXTRA
STOP
BIT 1
STOP
STOP
BIT 1
BIT 1
Optional
STOP
BIT 2
Optional
Optional
STOP
STOP
BIT 2
BIT 2
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