MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 11

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

Table 4:
Table 5:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
E1, E7, E9, F7,
D7, D3, C3,
C9, D1, D9,
B7, D7, D3,
A2, A8, B1,
NUMBERS
A8, B7, C7,
C7, C9, D1,
B2, D2, C8,
B1, B9, C1,
B9, C1, C3,
D9, E1, E7,
A1, C2, E2,
F8, M7, A7
A3, F2, M3
Numbers
E9, F7, H2
B3, A2
E8, A9
B8, D8
H2, F9
FBGA
FBGA
H2
B3
E3
F9
F1
Ball/Pin Descriptions (Continued)
Reserved NC Balls and Pins
NC pins not listed may also be reserved for other uses; this table defines NC pins of importance
2, 4, 7, 8, 10,
6, 12, 52, 58,
3, 9, 15, 55,
NUMBERS
4, 7, 10, 13,
11, 13, 54,
56, 57, 59,
60, 62, 63,
14, 17, 25,
11, 56, 59,
14, 16, 17,
20, 25, 42,
43, 53, 54,
57, 60, 63,
13, 14, 16,
17, 20, 25,
42, 43, 53,
54, 57, 59,
Numbers
42, 43, 53
60, 63, 65
34, 48, 66
5, 11, 56,
1, 18, 33
7, 8, 10,
2, 4, 5,
2, 5, 8,
62, 65
19, 50
TSOP
42,17
TSOP
65
62
51
16
51
61
64
49
DQ12–DQ14
DQ9–DQ11
DQ6, DQ7
SYMBOL
DQ0–DQ2
DQ3–DQ5
DQ6–DQ8
DQ0–DQ2
DQ3–DQ5
DQ0–DQ2
A12, A13
Symbol
UDQS
DQ15
V
LDQS
V
DNU
DQ3
DQS
V
V
V
NC
NC
NC
DD
SS
REF
DD
SS
Q
Q
Supply
Supply
Supply
Supply
Supply
TYPE
Type
I/O
I/O
I/O
I/O
I
–
–
–
–
DESCRIPTION
Address inputs A12 and A13 for 256Mb, 512Mb and 1Gb devices.
DNU for FBGA.
Description
Data Input/Output: Data bus for x16
No Connect for x16
These pins should be left unconnected.
Data Input/Output: Data bus for x8
No Connect for x8
These pins should be left unconnected.
Data Input/Output: Data bus for x4
No Connect for x4
These pins should be left unconnected.
Data Strobe: Output with read data, input with write data. DQS is
edge-aligned with read data, centered in write data. It is used to
capture data. For the x16, LDQS is DQS for DQ0–DQ7 and UDQS is
DQS for DQ8–DQ15. Pin 16 (E7) is NC on x4 and x8.
Do Not Use: Must float to minimize noise on V
DQ Power Supply: +2.5 ±0.2V (+2.6V ±0.1V for DDR400). Isolated
on the die for improved noise immunity.
DQ Ground. Isolated on the die for improved noise immunity.
Power Supply: +2.5V ±0.2V (+2.6V ±0.1V for DDR400).
Ground.
SSTL_2 reference voltage.
11
Ball/Pin Descriptions and Assignments
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
REF
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