MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 73

• Manufacturer Part Number: MT46V32M4TG-6T:D TR
• Description: IC DDR SDRAM 128MBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M4TG-6T:D TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (32Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1024-2

Figure 38:
Figure 39:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
e. The full variation in the ratio of the maximum to minimum pull-up and pull-down current should be
f. The full variation in the ratio of the nominal pull-up to pull-down current should be unity ±10 percent, for
between 0.71 and 1.4 for device drain-to-source voltages from 0.1V to 1.0V, and at the same voltage and tem-
perature.
device drain-to-source voltages from 0.1V to 1.0V.
Reduced Drive Pull-Down Characteristics
Reduced Drive Pull-Up Characteristics
10.
11.
7.
8.
9. V
-10
-20
-30
-40
-50
-60
-70
-80
80
70
60
50
40
30
20
10
0
0
The voltage levels used are derived from a minimum
test load. In practice, the voltage levels obtained from a properly terminated bus
will provide significantly different voltage values.
V
width can not be greater than
1.5V for a pulse width ≤ 3ns and the pulse width can not be greater than 1/3 of the
cycle rate.
t
prevail over
t
but specify when the device output is no longer driving (
(
0.0
0.0
HZ (MAX) will prevail over
RPST end point and
t
IH
DD
RPRE).
overshoot: V
and V
0.5
DD
0.5
t
DQSCK (MIN) +
Q must track each other.
IH
1.0
1.0
(MAX) = V
t
RPRE begin point are not referenced to a specific voltage level
V
DD
V
Q - V
OUT
OUT
73
(V)
(V)
t
DQSCK (MAX) +
t
RPRE (MAX) condition.
1.5
1.5
DD
1/3
Q + 1.5V for a pulse width ≤ 3ns and the pulse
of the cycle rate. V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2.
2.0
128Mb: x4, x8, x16 DDR SDRAM
t
RPST (MAX) condition.
2.5
V
IL
DD
undershoot: V
©2000 Micron Technology, Inc. All rights reserved.
t
level and the referenced
RPST), or begins driving
t
LZ (MIN) will
IL
(MIN) = -
Notes