MT46V32M4TG-6T:D TR Micron Technology Inc, MT46V32M4TG-6T:D TR Datasheet - Page 46

IC DDR SDRAM 128MBIT 6NS 66TSOP

MT46V32M4TG-6T:D TR

Manufacturer Part Number
MT46V32M4TG-6T:D TR
Description
IC DDR SDRAM 128MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V32M4TG-6T:D TR

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (32Mx4)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1024-2
Figure 30:
09005aef8074a655
128MBDDRx4x8x16_2.fm - Rev. J 4/05 EN
COMMAND
ADDRESS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE to PRECHARGE Odd Number of Data, Interrupting
Bank a,
WRITE
Col b
T0
Notes: 1. DI b = data-in for column b.
t
t
t
DQSS
DQSS
DQSS
2. An interrupted burst of 8 is shown; one data element is written.
3.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5. DQS is required at T4 and T4n (nominal case) to register DM.
6. If the burst of 4 was used, DQS and DM would not be required at T3, T3n, T4 and T4n.
7. PRE = PRECHARGE command.
DI
t
b
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
T1
DI
b
DI
b
T1n
NOP
T2
T2n
t
46
WR
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3n
(a or all)
Bank,
T4
PRE
128Mb: x4, x8, x16 DDR SDRAM
7
DON’T CARE
T4n
T5
NOP
©2000 Micron Technology, Inc. All rights reserved.
TRANSITIONING DATA
t
RP
T6
NOP
Operations

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