AT25DF321A-SH-T Atmel, AT25DF321A-SH-T Datasheet - Page 36

• Manufacturer Part Number: AT25DF321A-SH-T
• Description: IC FLASH 32MBIT 100MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF321A-SH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 32M (16384 pages x 256 Bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Density: 32Mb
• Access Time (max): 5ns
• Interface Type: Serial (SPI)
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 19mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.
12.1
36
Other Commands and Functions
Reset
In some applications, it may be necessary to prematurely terminate a program or erase cycle early rather than wait the
hundreds of microseconds or milliseconds necessary for the program or erase operation to complete normally. The Reset
command allows a program or erase operation in progress to be ended abruptly and returns the device to an idle state.
Since the need to reset the device is immediate, the Write Enable command does not need to be issued prior to the Reset
command being issued. Therefore, the Reset command operates independently of the state of the WEL bit in the Status
Register.
The Reset command can only be executed if the command has been enabled by setting the Reset Enabled (RSTE) bit in
the Status Register to a logical “1”. If the Reset command has not been enabled (the RSTE bit is in the logical “0” state),
then any attempts at executing the Reset command will be ignored.
To perform a Reset, the CS pin must first be asserted and the opcode of F0h must be clocked into the device. No address
bytes need to be clocked in, but a confirmation byte of D0h must be clocked into the device immediately after the opcode.
Any additional data clocked into the device after the confirmation byte will be ignored. When the CS pin is deasserted, the
program or erase operation currently in progress will be terminated within a time of t
operation may not complete before the device is reset, the contents of the page being programmed or the block being
erased cannot be guaranteed to be valid.
The Reset command has no effect on the states of the Sector Protection Registers, the Sector Lockdown Registers, or the
SPRL, RSTE, and SLE bits in the Status Register. The WEL, PS, and ES bits, however, will be reset back to their default
states. If a Reset operation is performed while a sector is erase suspended, the suspend operation will abort, and the
contents of the block being erased in the suspended sector will be left in an undefined state. If a Reset is performed while
a sector is program suspended, the suspend operation will abort, and the contents of the page that was being
programmed and subsequently suspended will be undefined. The remaining pages in the 64-Kbyte sector will retain their
previous contents.
The complete opcode and confirmation byte must be clocked into the device before the CS pin is deasserted, and the CS
pin must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no Reset operation will be
performed.
Figure 12-1. Reset
SCK
Atmel AT25DF321A
SO
CS
SI
MSB
HIGH-IMPEDANCE
1
0
1
1
1
2
OPCODE
1
3
0
4
0
5
0
6
0
7
MSB
1
8
CONFIRMATION BYTE IN
1
9
0
10 11
1
0
12
0
13
0
14 15
0
RST
. Since the program or erase
3686D–DFLASH–12/09