MA240029 Microchip Technology, MA240029 Datasheet - Page 334

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

PIC24FJ128GA310 FAMILY
REGISTER 29-1:
DS39996F-page 334
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6-5
bit 4
WINDIS
R/PO-1
U-1
r-x
—
r
Unimplemented: Read as ‘1’
Reserved: The value is unknown; program as ‘0’
JTAGEN: JTAG Port Enable bit
1 = JTAG port is enabled
0 = JTAG port is disabled
GCP: General Segment Program Memory Code Protection bit
1 = Code protection is disabled
0 = Code protection is enabled for the entire program memory space
GWRP: General Segment Code Flash Write Protection bit
1 = Writes to program memory are allowed
0 = Writes to program memory are not allowed
DEBUG: Background Debugger Enable bit
1 = Device resets into Operational mode
0 = Device resets into Debug mode
LPCFG: Low-Voltage/Retention Regulator Configuration bit
1 = Low-voltage/retention regulator is always disabled
0 = Low-power, low-voltage/retention regulator is enabled and controlled in firmware by the RETEN bit
ICS<1:0>: Emulator Pin Placement Select bits
11 = Emulator functions are shared with PGEC1/PGED1
10 = Emulator functions are shared with PGEC2/PGED2
01 = Emulator functions are shared with PGEC3/PGED3
00 = Reserved; do not use
WINDIS: Windowed Watchdog Timer Disable bit
1 = Standard Watchdog Timer is enabled
0 = Windowed Watchdog Timer is enabled; (FWDTEN<1:0> must not be ‘00’)
FWDTEN<1:0>: Watchdog Timer Configuration bits
11 = WDT is always enabled; SWDTEN bit has no effect
10 = WDT is enabled and controlled in firmware by the SWDTEN bit
01 = WDT is enabled only in Run mode and disabled in Sleep modes; SWDTEN bit is disabled
00 = WDT is disabled; SWDTEN bit is disabled
FWPSA: WDT Prescaler Ratio Select bit
1 = Prescaler ratio of 1:128
0 = Prescaler ratio of 1:32
FWDTEN1
JTAGEN
R/PO-1
R/PO-1
U-1
—
CW1: FLASH CONFIGURATION WORD 1
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
FWDTEN0
R/PO-1
R/PO-1
GCP
U-1
—
R/PO-1
R/PO-1
FWPSA
GWRP
U-1
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTPS3
DEBUG
R/PO-1
R/PO-1
U-1
—
WDTPS2
R/PO-1
LPCFG
R/PO-1
U-1
—
 2010-2011 Microchip Technology Inc.
x = Bit is unknown
WDTPS1
R/PO-1
R/PO-1
ICS1
U-1
—
WDTPS0
R/PO-1
R/PO-1
ICS0
U-1
—
bit 16
bit 8
bit 0