AT45DB161D-TU Atmel, AT45DB161D-TU Datasheet - Page 20

• Manufacturer Part Number: AT45DB161D-TU
• Description: IC FLASH 16MBIT 66MHZ 28TSOP
• Manufacturer: Atmel

Specifications of AT45DB161D-TU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (4096 pages x 528 bytes)
• Speed: 66MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSOP
• Memory Configuration: 4096 Pages X 528 Bytes
• Interface Type: Serial, SPI
• Clock Frequency: 66MHz
• Supply Voltage Range: 2.5V To 3.6V, 2.7V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.2
10.2.1
Figure 10-3. Program Security Register
20
CS
Security Register
SI
AT45DB161D
Programming the Security Register
Each transition
represents 8 bits
Opcode
Byte 1
The device contains a specialized Security Register that can be used for purposes such as
unique device serialization or locked key storage. The register is comprised of a total of 128
bytes that is divided into two portions. The first 64 bytes (byte locations 0 through 63) of the
Security Register are allocated as a one-time user programmable space. Once these 64 bytes
have been programmed, they cannot be reprogrammed. The remaining 64 bytes of the register
(byte locations 64 through 127) are factory programmed by Atmel and will contain a unique
value for each device. The factory programmed data is fixed and cannot be changed.
Table 10-3.
The user programmable portion of the Security Register does not need to be erased before it is
programmed.
To program the Security Register, the CS pin must first be asserted and the appropriate 4-byte
opcode sequence must be clocked into the device in the correct order. The 4-byte opcode
sequence must start with 9BH and be followed by 00H, 00H, and 00H. After the last bit of the
opcode sequence has been clocked into the device, the data for the contents of the 64-byte user
programmable portion of the Security Register must be clocked in.
After the last data byte has been clocked in, the CS pin must be deasserted to initiate the inter-
nally self-timed program cycle. The programming of the Security Register should take place in a
time of t
is powered-down during the program cycle, then the contents of the 64-byte user programmable
portion of the Security Register cannot be guaranteed.
If the full 64 bytes of data is not clocked in before the CS pin is deasserted, then the values of
the byte locations not clocked in cannot be guaranteed. For example, if only the first two bytes
are clocked in instead of the complete 64 bytes, then the remaining 62 bytes of the user pro-
grammable portion of the Security Register cannot be guaranteed. Furthermore, if more than 64
bytes of data is clocked into the device, then the data will wrap back around to the beginning of
the register. For instance, if 65 bytes of data are clocked in, then the 65th byte will be stored at
byte location 0 of the Security Register.
The user programmable portion of the Security Register can only be programmed one
time. Therefore, it is not possible to only program the first two bytes of the register and then pro-
gram the remaining 62 bytes at a later time.
The Program Security Register command utilizes the internal SRAM buffer 1 for processing.
Therefore, the contents of the buffer 1 will be altered from its previous state when this command
is issued.
Data Type
P
Opcode
, during which time the Status Register will indicate that the device is busy. If the device
Byte 2
Security Register
Opcode
Byte 3
0
One-time User Programmable
Opcode
1
Byte 4
• • •
Data Byte
Security Register Byte Number
n
62
Data Byte
63
n + 1
64
Factory Programmed By Atmel
65
Data Byte
n + x
• • •
3500I–DFLASH–8/07
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127